DS90LV019
- LVDS Signaling
- 3.3V or 5.0V operation
- Low power CMOS design
- Balanced Output Impedance
- Glitch free power up/down (Driver disabled)
- High Signaling Rate Capacity (above 100 Mbps)
- Ultra Low Power Dissipation
- ±1V Common-Mode Range
- ±100 mV Receiver Sensitivity
- Product offered in SOIC and TSSOP packages
- Flow-Through Pin Out
- Industrial Temperature Range Operation
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
The DS90LV019 is a Driver/Receiver designed specifically for the high speed low power point-to-point interconnect applications. The device operates from a single 3.3V or 5.0V power supply and includes one differential line driver and one receiver. The DS90LV019 features an independent driver and receiver with TTL/CMOS compatibility (DIN and ROUT). The logic interface provides maximum flexibility as 4 separate lines are provided (DIN, DE, RE#, and ROUT). The device also features a flow-through pin out which allows easy PCB routing for short stubs between its pins and the connector. The driver has 3.5 mA output loop current.
The driver translates between TTL levels (single-ended) to Low Voltage Differential Signaling levels. This allows for high speed operation, while consuming minimal power with reduced EMI. In addition, the differential signaling provides common-mode noise rejection.
The receiver threshold is ±100 mV over a ±1V common-mode range and translates the low swing differential levels to standard (TTL/CMOS) levels.
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技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | DS90LV019 3.3V or 5V LVDS Driver/Receiver 数据表 (Rev. B) | 2004-5-14 | |||
| 应用手册 | An Overview of LVDS Technology | 1998-10-5 |
设计与开发
如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。
DS90LV047-48AEVM — DS90LV047-48AEVM 评估模块
| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| SOIC (D) | 14 | Ultra Librarian |
| TSSOP (PW) | 14 | Ultra Librarian |
订购和质量
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