封装信息
| 封装 | 引脚 CFP (NAC) | 16 |
| 工作温度范围 (°C) -55 to 125 |
| 包装数量 | 包装 88 | JEDEC TRAY (5+1) |
DS90C032QML-SP 的特性
- Single Event Latchup (SEL) Immune 120 MeV-cm2/mg
- High Impedance LVDS Inputs with Power-Off.
- Accepts Small Swing (330 mV) Differential Signal Levels
- Low Power Dissipation
- Low Differential Skew
- Low Chip to Chip Skew
- Pin Compatible with DS26C32A
- Compatible with IEEE 1596.3 SCI LVDS Standard
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DS90C032QML-SP 的说明
The DS90C032 is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates.
The DS90C032 accepts low voltage differential input signals and translates them to CMOS (TTL compatible) output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports OPEN Failsafe and terminated (100Ω) input Failsafe with the addition of external failsafe biasing. Receiver output will be HIGH for both Failsafe conditions.
The DS90C032 provides power-off high impedance LVDS inputs. This feature assures minimal loading effect on the LVDS bus lines when VCC is not present.
The DS90C032 and companion line driver (DS90C031) provide a new alternative to high power pseudo-ECL devices for high speed point-to-point interface applications.