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  • ADS816x 具有直接传感器接口的 8 通道 16 位 1MSPS SAR ADC

    • ZHCSIK6D November   2017  – June 2024 ADS8166 , ADS8167 , ADS8168

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  • ADS816x 具有直接传感器接口的 8 通道 16 位 1MSPS SAR ADC
  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Thermal Information
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Timing Diagrams
    9. 5.9 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Analog Multiplexer
        1. 6.3.1.1 Multiplexer Configurations
        2. 6.3.1.2 Multiplexer With Minimum Crosstalk
        3. 6.3.1.3 Early Switching for Direct Sensor Interface
      2. 6.3.2 Reference
      3. 6.3.3 REFby2 Buffer
      4. 6.3.4 Converter Module
        1. 6.3.4.1 Internal Oscillator
        2. 6.3.4.2 ADC Transfer Function
      5. 6.3.5 Low-Dropout Regulator (LDO)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Channel Selection Using Internal Multiplexer
        1. 6.4.1.1 Manual Mode
        2. 6.4.1.2 On-The-Fly Mode
        3. 6.4.1.3 Auto Sequence Mode
        4. 6.4.1.4 Custom Channel Sequencing Mode
      2. 6.4.2 Digital Window Comparator
    5. 6.5 Programming
      1. 6.5.1 Data Transfer Protocols
        1. 6.5.1.1 Enhanced-SPI Interface
          1. 6.5.1.1.1 Protocols for Configuring the Device
          2. 6.5.1.1.2 Protocols for Reading From the Device
            1. 6.5.1.1.2.1 SPI Protocols With a Single SDO
            2. 6.5.1.1.2.2 SPI Protocols With Dual SDO
            3. 6.5.1.1.2.3 Clock Re-Timer Data Transfer
              1. 6.5.1.1.2.3.1 Output Bus Width Options
      2. 6.5.2 Register Read/Write Operation
  8. 7 Register Maps
    1. 7.1 Interface and Hardware Configuration Registers
      1. 7.1.1 REG_ACCESS Register (address = 00h) [reset = 00h]
      2. 7.1.2 PD_CNTL Register (address = 04h) [reset = 00h]
      3. 7.1.3 SDI_CNTL Register (address = 008h) [reset = 00h]
      4. 7.1.4 SDO_CNTL1 Register (address = 0Ch) [reset = 00h]
      5. 7.1.5 SDO_CNTL2 Register (address = 0Dh) [reset = 00h]
      6. 7.1.6 SDO_CNTL3 Register (address = 0Eh) [reset = 00h]
      7. 7.1.7 SDO_CNTL4 Register (address = 0Fh) [reset = 00h]
      8. 7.1.8 DATA_CNTL Register (address = 10h) [reset = 00h]
      9. 7.1.9 PARITY_CNTL Register (address = 11h) [reset = 00h]
    2. 7.2 Device Calibration Registers
      1. 7.2.1 OFST_CAL Register (address = 18h) [reset = 00h]
      2. 7.2.2 REF_MRG1 Register (address = 19h) [reset = 00h]
      3. 7.2.3 REF_MRG2 Register (address = 1Ah) [reset = 00h]
      4. 7.2.4 REFby2_MRG Register (address = 1Bh) [reset = 00h]
    3. 7.3 Analog Input Configuration Registers
      1. 7.3.1 AIN_CFG Register (address = 24h) [reset = 00h]
      2. 7.3.2 COM_CFG Register (address = 27h) [reset = 00h]
    4. 7.4 Channel Sequence Configuration Registers Map
      1. 7.4.1 DEVICE_CFG Register (address = 1Ch) [reset = 00h]
      2. 7.4.2 CHANNEL_ID Register (address = 1Dh) [reset = 00h]
      3. 7.4.3 SEQ_START Register (address = 1Eh) [reset = 00h]
      4. 7.4.4 SEQ_ABORT Register (address = 1Fh) [reset = 00h]
      5. 7.4.5 ON_THE_FLY_CFG Register (address = 2Ah) [reset = 00h]
      6. 7.4.6 AUTO_SEQ_CFG1 Register (address = 80h) [reset = 00h]
      7. 7.4.7 AUTO_SEQ_CFG2 Register (address = 82h) [reset = 00h]
      8. 7.4.8 Custom Channel Sequencing Mode Registers
        1. 7.4.8.1 CCS_START_INDEX Register (address = 88h) [reset = 00h]
        2. 7.4.8.2 CCS_END_INDEX Register (address = 89h) [reset = 00h]
        3. 7.4.8.3 CCS_SEQ_LOOP Register (address = 8Ah) [reset = 00h]
        4. 7.4.8.4 CCS_CHID_INDEX_m Registers (address = 8C, 8E, 90, 92, 94, 96, 98, 9A, 9C, 9E, A0, A2, A4, A6, A8, and AAh) [reset = 00h]
        5. 7.4.8.5 REPEAT_INDEX_m Registers (address = 8D, 8F, 91, 93, 95, 97, 99, 9B, 9D, 9F, A1, A3, A5, A7, A9, and ABh) [reset = 00h]
    5. 7.5 Digital Window Comparator Configuration Registers Map
      1. 7.5.1  ALERT_CFG Register (address = 2Eh) [reset = 00h]
      2. 7.5.2  HI_TRIG_AINx[15:0] Register (address = 4Dh to 30h) [reset = 0000h]
      3. 7.5.3  LO_TRIG_AINx[15:0] Register (address = 71h to 54h) [reset = 0000h]
      4. 7.5.4  HYSTERESIS_AINx[7:0] Register (address = 4Fh to 33h) [reset = 00h]
      5. 7.5.5  ALERT_LO_STATUS Register (address = 78h) [reset = 00h]
      6. 7.5.6  ALERT_HI_STATUS Register (address = 79h) [reset = 00h]
      7. 7.5.7  ALERT_STATUS Register (address = 7Ah) [reset = 00h]
      8. 7.5.8  CURR_ALERT_LO_STATUS Register (address = 7Ch) [reset = 00h]
      9. 7.5.9  CURR_ALERT_HI_STATUS Register (address = 7Dh) [reset = 00h]
      10. 7.5.10 CURR_ALERT_STATUS Register (address = 7Eh) [reset = 00h]
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Multiplexer Input Connection
    2. 8.2 Typical Applications
      1. 8.2.1 1MSPS DAQ Circuit With Lowest Distortion and Noise Performance
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
    3.     Power Supply Recommendations
    4. 8.3 Layout
      1. 8.3.1 Layout Guidelines
        1. 8.3.1.1 Analog Signal Path
        2. 8.3.1.2 Grounding and PCB Stack-Up
        3. 8.3.1.3 Decoupling of Power Supplies
        4. 8.3.1.4 Reference Decoupling
        5. 8.3.1.5 Reference Buffer Decoupling
        6. 8.3.1.6 Multiplexer Input Decoupling
        7. 8.3.1.7 ADC Input Decoupling
        8. 8.3.1.8 Example Schematic
      2. 8.3.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
  13. 重要声明
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Data Sheet

ADS816x 具有直接传感器接口的 8 通道 16 位 1MSPS SAR ADC

本资源的原文使用英文撰写。 为方便起见，TI 提供了译文；由于翻译过程中可能使用了自动化工具，TI 不保证译文的准确性。 为确认准确性，请务必访问 ti.com 参考最新的英文版本（控制文档）。

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1 特性

  • 紧凑型低功耗数据采集系统：
    • 多路复用器输出引脚支持单个外部驱动器放大器
    • 16 位 SAR ADC
    • 低漂移集成基准和缓冲器
    • 适用于模拟输入直流偏置的 0.5 × VREF 输出
  • 出色的交流和直流性能：
    • SNR：92dB，THD：-110dB
    • INL：±0.3LSB，16 位，无丢码
  • 具有通道序列发生器的多路复用器：
    • 多通道时序控制选项：
      • 手动模式、动态模式、自动序列模式、自定义通道定序
    • 动态模式可缩短响应时间
  • 系统监测特性：
    • 每通道可编程窗口比较器
    • 通过可编程迟滞避免错误触发
  • 增强型 SPI 数字接口：
    • 在 16MHz SCLK 下具有 1MSPS 的吞吐量
    • 50MHz 高速数字接口
  • 宽工作电压范围：
    • 外部 VREF 输入范围：2.5V 至 5V
    • AVDD 范围：3V 至 5.5V
    • DVDD 范围：1.65V 至 5.5V
    • -40°C 至 +125°C 温度范围

2 应用

  • 化学、气体分析仪
  • 麻醉给药系统
  • 混合模块（AI、AO、DI、DO）
  • 数据中心内部互连（城域）

3 说明

ADS816x 是一个 16 位、8 通道、高精度逐次逼近寄存器 (SAR) 模数转换器 (ADC) 系列。这些 ADC 由 5V 单电源供电，总吞吐量为 1MSPS (ADS8168)、500kSPS (ADS8167) 和 250kSPS (ADS8166)。

输入多路复用器支持更长的建立时间，这使得驱动模拟输入更加容易。多路复用器和 ADC 模拟输入的输出可作为器件引脚提供。该配置使一个 ADC 驱动器运算放大器可用于多路复用器的全部八路模拟输入。

ADS816x 包含一个数字窗口比较器，其中每个模拟输入通道都具有可编程的高低警报阈值。这种具有可编程警报阈值的单运算放大器解决方案可实现低功耗、低成本且具有超小外形尺寸的应用。

封装信息
器件型号 封装(1) 封装尺寸(2)
ADS816x RHB（VQFN，32） 5mm × 5mm
(1) 如需更多信息，请参阅机械、封装和可订购信息。
(2) 封装尺寸（长 × 宽）为标称值，并包括引脚（如适用）。

 

ADS8166 ADS8167 ADS8168 ADS816x 方框图ADS816x 方框图

4 Pin Configuration and Functions

ADS8166 ADS8167 ADS8168 RHB Package,32-Pin VQFN(Top View) Figure 4-1 RHB Package,32-Pin VQFN(Top View)
Table 4-1 Pin Functions
PIN FUNCTION DESCRIPTION
NAME NO.
ADC-INM 20 Analog input Negative ADC analog input.
ADC-INP 17 Analog input Positive ADC analog input.
AIN0 9 Analog input Analog input channel 0.
AIN1 10 Analog input Analog input channel 1.
AIN2 11 Analog input Analog input channel 2.
AIN3 12 Analog input Analog input channel 3.
AIN4 13 Analog input Analog input channel 4.
AIN5 14 Analog input Analog input channel 5.
AIN6 15 Analog input Analog input channel 6.
AIN7 16 Analog input Analog input channel 7.
AIN-COM 8 Analog input Common analog input.
ALERT 22 Digital output Digital ALERT output; active high.
This pin is the output of the logical OR of the enabled channel ALERTs.
AVDD 32 Power supply Analog power-supply pin. Connect a 1µF capacitor from this pin to GND.
CS 23 Digital input Chip-select input pin; active low.
The device starts converting the active input channel on the rising edge of CS.
The device takes control of the data bus when CS is low.
The SDO-x pins go Hi-Z when CS is high.
DECAP 2 Power supply Connect a 1µF capacitor to GND for the internal power supply.
DVDD 30 Power supply Interface power-supply pin. Connect a 1µF capacitor from this pin to GND.
GND 1, 21, 31 Power supply Ground.
MUXOUT-M 19 Analog output MUX negative analog output.
MUXOUT-P 18 Analog output MUX positive analog output.
READY 28 Digital output Multifunction output pin.
When CS is held high, READY reflects the device conversion status. READY is low when a conversion is in process.
When CS is low, the status of READY depends on the output protocol selection.
REFby2 7 Analog output The output voltage on this pin is equal to half the voltage on the REFP pin.
Connect a 1µF capacitor from this pin to GND.
REFIO 3 Analog input/output External reference voltage input; internal reference is a 4.096V output.
Connect a 1µF capacitor from this pin to GND.
REFM 4 Analog input Reference ground potential; short this pin to GND externally.
REFP 5, 6 Analog input/output Reference buffer output, ADC reference input. Short pins 5 and 6 together.
RST 29 Digital input Asynchronous reset input pin.
A low pulse on the RST pin resets the device. All register bits return to the default states.
SCLK 25 Digital input Clock input pin for the serial interface.
All system-synchronous data transfer protocols are timed with respect to the SCLK signal.
SDI 24 Digital input Serial data input pin.
This pin transfers data or commands into the device.
SDO-0 26 Digital output Serial communication pin: data output 0.
SDO-1/ SEQSTS 27 Digital output Multifunction output pin. By default, this pin indicates the channel scanning status in the auto and custom channel sequence modes.
In dual SDO data transfer mode, this pin functions as a serial communication pin: data output 1.
Thermal pad Supply Exposed thermal pad; connect to GND.

5 Specifications

5.1 Absolute Maximum Ratings

over operating ambient temperature range (unless otherwise noted)(1)
MINMAXUNIT
AVDD to GND–0.37V
DVDD to GND–0.37V
AINx(2), AIN-COM, MUXOUT-P, MUXOUT-M, ADC-INP, ADC-INMGND – 0.3AVDD + 0.3V
REFPREFM – 0.3AVDD + 0.3V
REFIOREFM – 0.3AVDD + 0.3V
REFMGND – 0.1GND + 0.1V
Digital input pinsGND – 0.3DVDD + 0.3V
Digital output pinsGND – 0.3DVDD + 0.3V
Input current to any pin except supply pins–1010mA
Junction temperature, TJ–40125°C
Storage temperature, Tstg–65150°C
(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) AINx refers to AIN0, AIN1, AIN2, AIN3, AIN4, AIN5, AIN6, and AIN7 pins.

 
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