ZHCS987C June   2012  – September 2017

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: Front-End Amplification (Weight-Scale Signal Chain)
    6. 6.6  Electrical Characteristics: Body Composition Measurement Front-End
    7. 6.7  Electrical Characteristics: Analog-to-Digital Converter
    8. 6.8  Electrical Characteristics: Digital Input/Output
    9. 6.9  Timing Requirements: Serial Interface Timing
    10. 6.10 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Weight-Scale Analog Front-End
        1. 7.3.1.1 Input Common Mode Range
        2. 7.3.1.2 Input Differential Dynamic Range
        3. 7.3.1.3 Offset Correction DAC
          1. 7.3.1.3.1 Offset Correction Example
      2. 7.3.2 Body Composition Measurement Analog Front-End
        1. 7.3.2.1 AC Rectification
        2. 7.3.2.2 I/Q Demodulation
      3. 7.3.3 Digitizer
        1. 7.3.3.1 Multiplexer
        2. 7.3.3.2 Analog-to-Digital Converter
      4. 7.3.4 Reset and Power-Up
      5. 7.3.5 Duty Cycling for Low Power
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operating Modes
    5. 7.5 Programming
      1. 7.5.1 Serial Interface
        1. 7.5.1.1 SPI Enable (STE)
        2. 7.5.1.2 Serial Clock (SCLK)
        3. 7.5.1.3 Data Input (SDIN)
        4. 7.5.1.4 Data Output (SDOUT)
        5. 7.5.1.5 Data Ready (RDY)
    6. 7.6 Register Maps
      1. 7.6.1 Register Map
        1. 7.6.1.1  ADC_DATA_RESULT (Address 0x00, Default 0x0000)
        2. 7.6.1.2  ADC_CONTROL_REGISTER1 (Address 0x01, Default 0x01C3)
        3. 7.6.1.3  MISC_REGISTER1 (Address 0x02, Default 0x8000)
        4. 7.6.1.4  MISC_REGISTER2 (Address 0x03, Default 0x7FFF)
        5. 7.6.1.5  DEVICE_CONTROL1 (Address 0x09, Default 0x0000)
        6. 7.6.1.6  ISW_MUX (Address 0x0A, Default 0x0000)
        7. 7.6.1.7  VSENSE_MUX (Address 0x0B, Default 0x0000)
        8. 7.6.1.8  IQ_MODE_ENABLE (Address 0x0C, Default 0x0000)
        9. 7.6.1.9  WEIGHT_SCALE_CONTROL (Address 0x0D, Default 0x0000)
        10. 7.6.1.10 BCM_DAC_FREQ (Address 0x0E, Default 0x0000)
        11. 7.6.1.11 DEVICE_CONTROL2 (Address 0x0F, Default 0x0000)
        12. 7.6.1.12 ADC_CONTROL_REGISTER2 (Address 0x10, Default 0x0000)
        13. 7.6.1.13 MISC_REGISTER3 (Address 0x1A, Default 0x0000)
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 BCM Channel Connections
      2. 8.1.2 Handling Oscillation of the Excitation Amplifier
      3. 8.1.3 Achieving Deterministic Phase in the IQ Mode
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
    1. 9.1 Power-Supply Recommendation and Initialization
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 接收文档更新通知
    2. 11.2 社区资源
    3. 11.3 商标
    4. 11.4 静电放电警告
    5. 11.5 Glossary
  12. 12机械、封装和可订购信息

修订历史

Changes from B Revision (June 2013) to C Revision

  • 添加了器件信息 表、ESD 额定值 表、特性 描述 部分、器件功能模式 部分、编程 部分、应用和实施 部分、电源建议 部分、布局 部分、器件和文档支持 部分以及机械、封装和可订购信息 部分Go
  • Changed 人体成分 特性 项目:在激励源 子项目中将 375 更改为 247.5,并删除了动态范围 子项目Go
  • 通篇将 TQFP 更改为 LQFP Go
  • Deleted Package Information section Go
  • Changed Pin Functions table title Go
  • Changed clock to serial clock in SCLK pin description of Pin Functions table Go
  • Changed VSENSEN to VSENSEM in pins 41 and 42 in Pin Functions table Go
  • Changed AVSS parameter name to Ground from Supply voltage in Recommended Operating Conditions tableGo
  • Changed symbol R1 to RFB1 in Electrical Characteristics: Front-End Amplification (Weight-Scale Signal Chain) tableGo
  • Changed typical specification of DAC full-scale voltage parameter from 1 to 1.05 in Electrical Characteristics: Body Composition Measurement Front-End tableGo
  • Changed Electrical Characteristics: Digital Input/Output table title Go
  • Changed multiplication signs (×) to minimum and maximum specifications of Electrical Characteristics: Digital Input/Output tableGo
  • Changed x-axis unit from µArms to µApk in BCM DAC Output Current Distribution figure Go
  • Changed Functional Block Diagram: swapped positions of RP1, RP0 and RN1, RN0 pinsGo
  • Changed BCM in AC Rectifier Mode figure: swapped positions of RP1, RP0 and RN1, RN0 pinsGo
  • Changed AC Rectification section: changed images to high-frequency images in second paragraph, VDAC to VDACOUT in Equation 5, and changed third paragraphGo
  • Changed third paragraph of AC Rectification section: deleted(still within the 500-µArms limit) from fourth sentence, changed last sentenceGo
  • Changed BCM in I/Q Demodulator Mode figure: swapped positions of RP1, RP0 and RN1, RN0 pinsGo
  • Changed Operating Modes sectionGo
  • Changed negative input to output in descriptions of IOUTP[5:0] and RP[1:0] and output to negative input in descriptions of IOUTN[5:0] and RN[1:0] in ISW_MUX registerGo
  • Changed bit 9 to DAC9 from 0 in BCM_DAC_FREQ register and changed bit count in bit descriptions to reflect this changeGo
  • Changed fCLK = 1 MHz to fCLK = 1.024 MHz in BCM_DAC_FREQ registerGo
  • Changed Component Values Corresponding to Figure 12 table: changed title of second column from Suggested Value to Illustrative Value, R3, R4 illustrative value to 10 kΩ from 100 kΩ, and changed table footnoteGo
  • Changed 1 MHz to 1.024 MHz in Example Value column of Weight Scale Design Requirements tableGo
  • Deleted touch from list of possible power-up interrupts in third paragraph of Detailed Design Procedure sectionGo
  • Changed first sentence of Application Curve section to reference Figure 15 Go
  • Changed capacitor to capacitances in last bullet of Layout Guidelines section Go

Changes from A Revision (June 2012) to B Revision

  • Changed title condition for Electrical CharancteristicsGo
  • Changed test condition for rectifier bandwidth parameterGo
  • Changed y-axis unit in Figure 5Go
  • Changed R1 percentage in Functional Block DiagramGo
  • Changed feedback resistor percentage in second paragraph after Figure 6Go
  • Changed description for last row of Table 2Go
  • Changed bit descriptions of ISW_MUX registerGo
  • Changed bit 9 for BCM_DAC_FREQ (Address 0x0E)Go
  • Changed bit numbers for MISC_REGISTER3 (Address 0x1A)Go

Changes from * Revision (June 2012) to A Revision

  • 已将数据表从产品预览更改为生产数据Go