TIDT257A February   2022  – October 2022

 

  1.   Description
  2.   Features
  3.   Application
  4. 1Test Prerequisites
    1. 1.1 Voltage and Current Requirements
    2. 1.2 Considerations
    3. 1.3 Dimensions
  5. 2Testing and Results
    1. 2.1 Efficiency Graphs
    2. 2.2 Efficiency Data
      1. 2.2.1 THD Optimization
    3. 2.3 Thermal Images
      1. 2.3.1 Low-Side GaN Junction Temperature
    4. 2.4 Thermal Mechanical Design
      1. 2.4.1 Design Parameters
      2. 2.4.2 Thermal Resistance Calculation
      3. 2.4.3 Heat-Sink Diagrams
    5. 2.5 EMI
  6. 3Waveforms
    1. 3.1 AC Drop
    2. 3.2 Load Transients
    3. 3.3 Start-Up Sequence

2.3 Thermal Images

Conditions

  • Same as efficiency test
  • Input: 230 VAC
  • Output: 380 V, 3.6 kW
  • Frequency: 65 kHz
  • Slew rate: 100 V/ns
  • Dead-time: 100 ns
  • Fan: FFB0412EN-00
    • Air-speed: 33 LFM, 6 m/s
  • Time: 30 minutes
Table 2-3 Heat Sink and Thermal Interface
GaN Heat Sink GaN TIM Silicon Heat Sink Silicon TIM
S08EDR03-A T-Work9000 S08EDR08 Tgard TNC-4(1)
(1) Silicon TIM used in room temperature test is LI2000A-150-150-0.2. Not recommended for worst case conditions. Contact TI for heat-sink drawings.
Note: The thermal design is based on 16-ARMS input current.
GUID-20220608-SS0I-NJMT-R20X-PJWBCFL9XBRV-low.jpg Figure 2-4 Test Setup
GUID-20220608-SS0I-K4ZG-2H42-GNQKNK95LGR7-low.jpgFigure 2-5 PFC Inductor
GUID-20220608-SS0I-ZFVQ-ZXLQ-QTSBW0CKNJTD-low.jpgFigure 2-7 LF Silicon FETs
GUID-20220608-SS0I-TVXR-SGS5-JZ8FTBFGGS3K-low.jpgFigure 2-6 Backside of FET Card
GUID-20220608-SS0I-PPDV-Q68K-FT6CZXNTBPVL-low.jpgFigure 2-8 Common-Mode Choke and Hall Sensor