TIDT249 September   2021

 

  1. 1Description
  2. 2Test Prerequisites
    1. 2.1 Voltage and Current Requirements
    2. 2.2 Required Equipment
    3. 2.3 Dimensions
  3. 3Test Results
    1. 3.1 Efficiency
    2. 3.2 System Performance
    3. 3.3 Bode Plots
    4. 3.4 Efficiency and Regulation Data
    5. 3.5 Thermal Data
  4. 4Waveforms
    1. 4.1 PFC Waveforms
    2. 4.2 CLLLC Waveforms

4.2 CLLLC Waveforms

Figure 4-4 shows CLLLC operation at 19 A (6.6 kW) under the following parameters:

  • Traces
    • C1: GaN Primary Switch Node Drain Voltage
    • C2: GaN Secondary Switch Node Drain Voltage
    • C3: Transformer Primary Current
    • C4: Transformer Secondary Current
  • Conditions
    • VIN = 400 V
    • VOUT = 350 V
    • IOUT = 19 A
GUID-20210812-SS0I-QF4N-3VBB-QDD9TNPXS0V1-low.png Figure 4-4 CLLLC Operation 19 A (6.6 kW)

Figure 4-5 shows CLLLC operation at 10 A and the following parameters:

  • Traces
    • C1: GaN Switch Node Drain Voltage Leg 1
    • C2: GaN Switch Node Drain Voltage Leg 2
    • C3: Transformer Primary Current
    • C4: Transformer Secondary Current
  • Conditions
    • VIN = 400 V
    • VOUT = 350 V
    • IOUT = 10 A
GUID-20210812-SS0I-WW4N-TKBJ-XHMBHHZPQZZM-low.jpg Figure 4-5 CLLLC Operation 10 A

A zoom-in of the GaN switch drain-to-source voltage transition is shown to be approximately 40 ns in Figure 4-6. This rapid transition comes from the low COSS of the LMG3522.

The waveform in Figure 4-6 is measured using the following parameters:

  • Traces
    • C1: GaN Switch Node Drain Voltage Leg 1
    • C2: GaN Switch Node Drain Voltage Leg 2
    • C3: Transformer Primary Current
    • C4: Transformer Secondary Current
  • Conditions
    • VIN = 400 V
    • VOUT = 350 V
    • IOUT = 10 A
GUID-20210812-SS0I-GMXM-3TZB-DK68W1V6Q3GS-low.jpg Figure 4-6 CLLLC Operation 10 A - GaN FET Transitions

The waveform in Figure 4-7 is measured using the following parameters:

  • Traces
    • C1: GaN Switch Node Drain Voltage Leg 1
    • C2: GaN Switch Node Drain Voltage Leg 2
    • C3: Transformer Primary Current
    • C4: Transformer Secondary Current
  • Conditions
    • VIN = 400 V
    • VOUT = 350 V
    • IOUT = 2 A
GUID-20210812-SS0I-ZW8N-BQWJ-7KHDN4J6MKL3-low.jpg Figure 4-7 CLLLC Operation 2 A

A zoom-in of the GaN switch drain-to-source voltage transition is shown to be approximately 75 ns in Figure 4-8. This rapid transition comes from the low COSS of the LMG3522. The slightly longer transition time in this image comes from the lighter load condition and the resulting reduced current flow.

The waveform in Figure 4-8 is measured using the following parameters:

  • Traces
    • C1: GaN Switch Node Drain Voltage Leg 1
    • C2: GaN Switch Node Drain Voltage Leg 2
    • C3: Transformer Primary Current
    • C4: Transformer Secondary Current
  • Conditions
    • VIN = 400 V
    • VOUT = 350 V
    • IOUT = 2 A
GUID-20210812-SS0I-T4PT-RKHC-XVDFTD0NQ7QJ-low.jpg Figure 4-8 CLLLC Operation 2 A - GaN FET Transitions