TIDT249 September   2021

 

  1. 1Description
  2. 2Test Prerequisites
    1. 2.1 Voltage and Current Requirements
    2. 2.2 Required Equipment
    3. 2.3 Dimensions
  3. 3Test Results
    1. 3.1 Efficiency
    2. 3.2 System Performance
    3. 3.3 Bode Plots
    4. 3.4 Efficiency and Regulation Data
    5. 3.5 Thermal Data
  4. 4Waveforms
    1. 4.1 PFC Waveforms
    2. 4.2 CLLLC Waveforms

4.1 PFC Waveforms

Figure 4-1 shows the PFC input voltage and input current waveform measured at the following parameters:

  • Traces
    • C2: VIN
    • C4: IIN
  • Conditions
    • VIN = 208 V
    • VOUT = 400 V
    • ROUT = 43 Ω
GUID-20210812-SS0I-HZKG-XKBH-RWMXTSLGRDKS-low.jpgFigure 4-1 PFC Input Voltage and Input Current

Figure 4-2 shows the PFC GaN drain voltage waveform measured at the following parameters:

  • Traces
    • C1: GaN Switch Node Drain Voltage
    • C2: VIN
    • C4: IIN
  • Conditions
    • VIN = 208 V
    • VOUT = 400 V
    • ROUT = 43 Ω
GUID-20210812-SS0I-BGMR-T5G3-0TRVTP71SCTL-low.jpgFigure 4-2 PFC GaN Drain Voltage

A zoom-in of the GaN switch drain-to-source voltage transition is shown to be approximately 20 ns in Figure 4-3. This rapid transition comes from the low COSS of the LMG3522.

The waveform in Figure 4-3 was measured using the following parameters:

  • Traces
    • C1: GaN Switch Node Drain Voltage
    • C2: VIN
    • C4: IIN
  • Conditions
    • VIN = 208 V
    • VOUT = 400 V
    • ROUT = 43 Ω
GUID-20210812-SS0I-TD3G-1VTV-B0FSRWL5TGLK-low.jpgFigure 4-3 PFC GaN Drain Voltage - Transition