SWRZ092B April 2021 – March 2022 IWR6843AOP
DCC Module Frequency Comparison can Report Erroneous Results
IWR6843AOP ES1.0 and IWR6843AOP ES2.0
The Dual-clock Comparator module, which is used to monitor a clock frequency while comparing with a known clock reference, could stop earlier than expected, and, thus, indicating the measured clock frequency to be lower. This is due to a clock domain crossing issue causing a preset to the error detection logic to get triggered.
Multiple measurements can be taken for the same clock pairs and abnormal frequencies reported can be ignored
Application code, where possible, could compare the clocks using an alternate clock comparator module (CCC).