SPRUIW4 October   2021 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1

 

  1.   Trademarks
  2. 1Feature Differences Between F28002x and F28003x
    1. 1.1 F28002x and F28003x Feature Comparison
  3. 2PCB Hardware Changes
    1. 2.1 PCB Hardware Changes for the 80-Pin PN, 64-Pin PM and 48-Pin PT Packages
    2. 2.2 80-Pin PN, 64-Pin PM and 48-Pin PT Migration Between F28002x and F28003x For New and Existing PCB
  4. 3Feature Differences for System Consideration
    1. 3.1 New Features in F28003x
      1. 3.1.1 Advance Encryption Standard (AES)
      2. 3.1.2 Secure Boot/JTAG Lock
      3. 3.1.3 Modular Controller Area Network (MCAN)
      4. 3.1.4 Embedded Pattern Generator (EPG)
      5. 3.1.5 Live Firmware Update (LFU)
    2. 3.2 Communication Module Changes
    3. 3.3 Control Module Changes
    4. 3.4 Analog Module Differences
    5. 3.5 Other Device Changes
      1. 3.5.1 PLL
      2. 3.5.2 PIE Channel Mapping
      3. 3.5.3 Bootrom
      4. 3.5.4 CLB and Motor Control Libraries
      5. 3.5.5 AGPIO
    6. 3.6 Power Management
      1. 3.6.1 LDO/VREG
      2. 3.6.2 POR/BOR
      3. 3.6.3 Power Consumption
    7. 3.7 Memory Module Changes
    8. 3.8 GPIO Multiplexing Changes
    9. 3.9 Analog Multiplexing Changes
  5. 4Application Code Migration From F28002x to F28003x
    1. 4.1 C2000Ware Header Files
    2. 4.2 Linker Command Files
    3. 4.3 C2000Ware Examples
  6. 5Specific Use Cases Related to F28003x New Features
    1. 5.1 AES
    2. 5.2 MCAN
    3. 5.3 EPG
  7. 6EABI Support
    1. 6.1 Flash API
  8. 7References

2.2 80-Pin PN, 64-Pin PM and 48-Pin PT Migration Between F28002x and F28003x For New and Existing PCB

For the color legend, see Figure 2-1 through Figure 2-4.

Table 2-1 80-Pin PN, 64-Pin PM and 48-Pin PT Migration Between F28002x and F28003x For New and Existing PCB
Pin No Pin Name Transition Type Action
80 64 48 F28002x F28003x F28003x to F28002x F28002x to F28003x
Minor Incompatibility - Signals in Common (1)
10 6 4 A6 A6 Common Analog Channel Use A6 (No change for 64-Pin and 80-Pin)
11 7 C6 B2, C6 Use C6
12 8 5 A3, C5, VDAC A3, B3, C5 VDAC Use A3, C5 or VDAC
13 9 6 A2, C9 A2, B6, C9 Use A2 or C9
14 10 7 A15, C7 A15, B9, C7 Use A15 or C7
15 11 - A14, C4 A14, B14, C4 Use A14 or C4
16 12 8 A11, C0 A11, B10, C0 Use A11 or C0
17 13 9 A5, C2 A5, B12, C2 Use A5 or C2
18 14 10 A1 A1, B7, DACB_OUT Use A1
19 15 11 A0, C15 A0, B15, C15, DACA_OUT Use A0 or C15
24 20 16 A8, C11 A8, B0, C11 Use A8 or C11
27 23 19 A4, C14 A4, B8, C14 Use A4 or C14
28 24 20 A9, C8 A9, B4, C8 Use A9 or C8
29 25 21 A10, C10 A10, B1, C10 Use A10 or C10
Major Incompatibility - Different Signals and Types
33 - - FLT2 GPIO20, B5 Flash Test Pins to GPIO/Analog No connect. Enable internal pull-up for the GPIOs on F28003x
34 - - FLT1 GPIO21, B11
- - 23 GPIO13 VDD Power to GPIO Tie to VDD through 0-Ohm resistor. Depopulate resistor when using F28002x and enable internal pull-up for the GPIO
- - 24 GPIO12 VDDIO Tie to VDDIO through 0-Ohm resistor. Depopulate resistor when using F28002x and enable internal pull-up for the GPIO
(Q Variant) Major Incompatibility - Different Signals and Types
- 46 - GPIO39 VREGENZ External VREG not supported. Tie to VSS through 0-Ohm resistor. Depopulate resistor when using F28002x and enable internal pull-up for the GPIO
(1) Channel to use selected in software.