SNLA299 August   2018 LMH0324 , LMH0397 , LMH1208 , LMH1218 , LMH1219 , LMH1297

 

  1.   LMH12xx MADI Compatibility Application Note
    1.     Trademarks
    2. 1 MADI Specification Requirements
      1. 1.1 MADI Transmitter Electrical Requirements
        1. 1.1.1 Line Driver Impedance
        2. 1.1.2 Mean Output Voltage
        3. 1.1.3 Maximum Output Voltage
        4. 1.1.4 Terminated Signal Rise and Fall Time
      2. 1.2 MADI Receiver Electrical Requirements
    3. 2 LMH12xx Device Family
      1. 2.1 LMH12xx Device Family
        1. 2.1.1 LMH1297 MADI Modes of Operation
          1. 2.1.1.1 Dual MADI Cable Driver
          2. 2.1.1.2 SDI Bidirectional IO and MADI Cable Driver
          3. 2.1.1.3 Bidirectional MADI Port and SDI MADI Cable Driver
          4. 2.1.1.4 Bidrectional MADI Port and SDI Cable Driver
        2. 2.1.2 LMH1297 Device Family Register Changes for MADI Compatibility
        3. 2.1.3 LMH1297 Device Family Hardware Changes for MADI Compatibility
      2. 2.2 LMH1218 Device Family Hardware Changes to Support MADI Compatibility
      3. 2.3 LMH1219 Device Family Recommended Register Settings
    4. 3 Summary
    5. 4 References

2.3 LMH1219 Device Family Recommended Register Settings

When operating as a MADI receiver, the LMH1219 and LMH0324 use the same register settings. The following register settings were used to bypass retimer because the LMH1219 does not lock to 125-Mbps MADI rate.

RAW FF 05 07 //enable eq core

RAW 31 20 30 //enable override

RAW 33 20 30 //out1 powered up

RAW FF 04 07 //enable retimer register table

RAW 3F 04 04 //Override reference rate

RAW 2F 00 C0 //Enable CDR lock to SMPTE rate

RAW 3F 10 10 //Override IN_OUT_SEL pin

RAW 31 00 03 //Select IN0 to OUT0 and OUT1

RAW 3F 08 08 ///Override OUT_CTRL

RAW 09 00 20 //Disable independent output control

RAW 1C 0C 0C //0x0C = forced raw data 0x08 = retimed data

RAW 0A 0C 0C //Reset CDR

RAW 0A 00 0C //Release CDR Reset