SLVUDW6B May   2026  – June 2026 TPSM8D7420 , TPSM8D7620

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 Setup
      1. 2.1.1 Input and Output Connector Descriptions
      2. 2.1.2 Modification
      3. 2.1.3 Input Capacitor
      4. 2.1.4 Output Capacitor
  8. 3Hardware Design Files
    1. 3.1 Schematic
    2. 3.2 PCB Layout
    3. 3.3 Bill of Materials
  9. 4Additional Information
    1. 4.1 Trademarks
  10. 5Revision History

2.1.3 Input Capacitor

The ceramic input capacitors provide a low impedance source to the regulator in addition to supplying the ripple current and isolating switching noise from other circuits. A minimum of 10μF ceramic capacitance is required at each input and ground pin pair of the TPSM8D7620. Use two 10μF ceramic capacitance or more to improve EMI performance. The input capacitor must be rated for at least the maximum input voltage that the application requires. Having twice the maximum input voltage to reduce DC bias derating is preferable.