SLVUCF4 August   2022

PRODUCTION DATA  

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Default Board Configuration
    2. 1.2 Alternate Board Configurations
  4. 2EVM Connectors and Test Points
  5. 3Test Results
    1. 3.1 Parallel Configuration Results
  6. 4Load Transient Circuitry
  7. 5Board Layout
  8. 6Schematic
    1. 6.1 Parallel Configuration Schematic
    2. 6.2 Single Configuration Schematic
  9. 7Bill of Materials (BOM)
    1. 7.1 Parallel Configuration BOM
    2. 7.2 Single Configuration BOM
  10. 8Revision History
  11. 9Related Documentation

4 Load Transient Circuitry

The TPS7H2221EVM contains a sub-circuit which enables the user to test how the TPS7H2221-SEP responds to a load transient. In many cases an electronic load (e-load) will suffice. However, in some scenarios the inducance introduced by the wire leads to an e-load can cause issues that interfere with testing. This problem is resolved through the use of the load transient sub-circuit that is provided on the EVM.

Figure 4-1 shows the schematic for this transient circuit. A power MOSEFT provided by Texas Instruments at Q1 is used to momentarily press the regulated VOUT voltage across power resistors R21 and R22 by modulating the gate of Q1 at JP15 with low duty cycle square wave.

GUID-16082BA7-87C7-4DB6-B7C1-C8141E0368E0-low.pngFigure 4-1 TPS7H2221EVM Load Transient Sub-circuit.

The default EVM components are configured for output short-circuit testing.

By changing the value of the power resistor(s) and the initial current set by the e-load, any desired current step size is achievable. The transient current step size is determined by:

Equation 1. ITRANS=VOUTRDSON_Q1+(R21||R22) 

Eliminating the uncertainty of RDSON_Q1 in the calculation of the transient current is possible by capturing the actual voltage at probe testpoint J16 and dividing by (R21||R22).

Equation 2. ITRANS=VJ16(R21||R22) 

The key to a successful measurement (i.e. one without a smoking resistor), is to determine the duty cycle to apply to the gate of Q1 to allow the right amount of current through so as to not exceed the power rating of R21 and R22.

Equation 3. PTRANS=VJ16×ITRANS

R21 and R22 have a power rating of 2 W. The maximum duty cycle of the square wave applied to the gate of Q1 is:

Equation 4. DJ15=PRATEDPTRANS

It is a good idea to leaving some margin for error by using a duty cycle lower than the maximum value calculated above.

The resistors on the gate of the FET can be used to control the turn-on and turn-off times of the transient. The voltage amplitude of the low duty cycle square wave applied to the gate of the FET via J15 will also impact the RDSON of the FET.

Output Short-Circuit Testing

If desired, the user is also able to test device behavior under output short-circuit conditions by using low resistances for R21 and R22. This trips the short-circuit protection features of the device, which limit the maximum value of the transient. Faster transients will typically result in higher peak current values.

One must take caution during such tests as they typically exceed the recommended operating conditions of the device, which can lead to damage or degradation of the part.