SLVUCD2 January   2022 TPS65917-Q1

 

  1.   Trademarks
  2. 1Introduction
  3. 2BOOT OTP Configuration
  4. 3Static Platform Settings
    1. 3.1 System Voltage Monitoring
    2. 3.2 SMPS
    3. 3.3 LDO
    4. 3.4 Interrupts
    5. 3.5 GPIO
    6. 3.6 MISC
    7. 3.7 SWOFF_HWRST
    8. 3.8 Shutdown_ColdReset
  5. 4Sequence Platform Settings
    1. 4.1 OFF2ACT Sequences
    2. 4.2 ACT2OFF Sequences

3.8 Shutdown_ColdReset

These OTP settings show whether each OFF request is configured to generate a shutdown request (SD) or cold reset request (CR).

  • When configured to generate an SD, the embedded power controller (EPC) executes a transition to the OFF state (SLP2OFF or ACT2OFF power sequence) and remains in the OFF state.
  • When configured to generate a CR, the EPC executes a transition to the OFF state (SLP2OFF or ACT2OFF power sequence) and restarts, transitioning to the ACTIVE state (OFF2ACT power sequence) if none of the ON request gating conditions are present.

Table 3-14 Shutdown_ColdReset OTP Settings
REGISTERBITDESCRIPTIONOTP VALUE
SWOFF_COLDRSTPWRON_LPKDefine if PWRON long key press causes shutdown or cold reset0: Shutdown
PWRDOWNDefine if PWRDOWN pin causes shutdown or cold reset0: Shutdown
WTDDefine if watchdog timer expiration causes shutdown or cold reset1: Cold reset
TSHUTDefine if thermal shutdown causes shutdown or cold reset0: Shutdown
RESET_INDefine if RESET_IN pin causes shutdown or cold reset1: Cold reset
SW_RSTDefine if SW_RST register bit causes shutdown or cold reset1: Cold reset
VSYS_LODefine if VSYS_LO causes shutdown or cold reset0: Shutdown
GPADC_SHUTDOWNDefine if GPADC shutdown causes shutdown or cold reset0: Shutdown