SLVUBU9A April   2020  – September 2020 TPS63900

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Background
    2. 1.2 Performance Specification
    3. 1.3 Modifications
  3. 2Setup
    1. 2.1 Input/Output Connector and Header Descriptions
      1. 2.1.1  J1, Pin 1 and 2 – VIN
      2. 2.1.2  J1, Pin 3 and 4 – S+/S-
      3. 2.1.3  J1, Pin 5 and 6 – GND
      4. 2.1.4  J2, Pin 1 and 2 – VOUT
      5. 2.1.5  J2, Pin 3 and 4 – S+/S-
      6. 2.1.6  J2, Pin 5 and 6 – GND
      7. 2.1.7  J4 – GND
      8. 2.1.8  JP1 – SEL
      9. 2.1.9  JP2 – ENABLE
      10. 2.1.10 JP3 – CFG1
      11. 2.1.11 JP4 – CFG2
      12. 2.1.12 JP5 – CFG3
      13. 2.1.13 S1, S2, S3, S4, S5, S6 – IC Configuration (R2D Interface)
    2. 2.2 Setup
  4. 3Board Layout
    1. 3.1 Layout
  5. 4Schematic
  6. 5Bill of Materials
  7.   Revision History

JP2 – ENABLE

Short the jumper between the center pin EN and ON to turn the IC on. Short the jumper between the center pin EN and OFF to turn the IC off. Use the center pin to apply an external enable signal.