SLVAFB4 July   2022 TPS62902-Q1 , TPS62903 , TPS62903-Q1

 

  1.   Abstract
  2.   Trademarks
  3. 1Inverting Buck – Boost Topology
    1. 1.1 Concept
    2. 1.2 Output Current Calculations
    3. 1.3 VIN and VOUT Range
  4. 2Digital Pin Configurations
    1. 2.1 Enable Pin
    2. 2.2 MODE/S-CONF Pin
    3. 2.3 Power Good Pin
  5. 3Design Considerations
    1. 3.1 Input Capacitor Selection
    2. 3.2 Output Inductor Selection
    3. 3.3 Stability Limits and Output Capacitor Selection
  6. 4Typical Performance and Waveforms
  7. 5Conclusion
  8. 6References

Stability Limits and Output Capacitor Selection

The switch node, inductor current, and the output voltage ripple during steady state are signals that need to be checked first for the stability of the system. Oscillations on the output voltage and the inductor current, and jitter on the switch node are good indicators of the instability of the system. Load transient response is another good test for stability, as described in the Simplifying Stability Checks application note.

The inverting buck - boost topology contains a right-half plane (RHP) zero which significantly and negatively impacts the control loop response by adding an increase in gain along with a decrease in phase at a high frequency. As a result the phase margin of the closed loop response is reduced which leading to potential instability and poor load transient response. Equation 9 estimates the frequency of the RHP zero. Where VOUT is a negative value.

Equation 9. f(RHP)=-(1-D)2x VOUT(D x L x IOUT x 2 x π)

It is recommended to keep the loop crossover frequency to 1/10th of the RHP zero frequency. Doing this requires either decreasing the inductance to increase the RHP zero frequency or increasing the output capacitance to decrease the crossover frequency. Note that the RHP zero frequency occurs at lower frequencies with lower input voltages, which have a higher duty cycle. A larger output capacitance is recommended for low input (< 12 V) voltage designs. How to Measure the Control Loop of DCS-Controltm Devices explains how to measure the control loop of a DCS-Control™ device.

The recommended minimum output capacitance for TPS62903 inverting buck-boost topology is 3x22 µF. The effective output capacitance post DC-bias derating is approximately 30 µF. The output capacitance used with inverting buck-boost is larger than would normally be used with a buck due to its right-half plane zero. More output capacitance pushes the crossover frequency of the control loop down to frequency lower enough so that the right-half plane zero is sufficiently higher for stability.