SLAZ759A December 2024 – November 2025 MSPM0L1116 , MSPM0L1117
I2C Module
Functional
I2C Busy status is enabled preventing low power entry
When in I2C Target mode, the I2C Busy Status stays high after a transaction if there is no STOP bit.
Program the I2C controller to send the STOP bit and don't send a NACK for the last byte. Terminate any I2C transfer with a STOP condition to maintain proper BUSY status and asynchronous clock request behavior (for low power mode reentry).