SLAZ730B January   2019  – August 2021 MSP430FR5043

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      PM64
      2.      RGC64
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  ADC42
    2. 6.2  ADC65
    3. 6.3  ADC68
    4. 6.4  ADC69
    5. 6.5  ADC70
    6. 6.6  ADC71
    7. 6.7  CPU21
    8. 6.8  CPU22
    9. 6.9  CPU40
    10. 6.10 CPU46
    11. 6.11 CPU47
    12. 6.12 CS12
    13. 6.13 PMM31
    14. 6.14 PMM32
    15. 6.15 RTC12
    16. 6.16 TB25
    17. 6.17 USCI42
    18. 6.18 USCI45
    19. 6.19 USCI47
    20. 6.20 USCI50
  7. 7Revision History

6.5 ADC70

ADC Module

Category

Functional

Function

DMA gets stuck when switching between ADC data transfer trigger types

Description

If the ADC performs a data transfer by the CPU ,e.g. via interrupt or flag polling,
AND
the ADC is then configured for an edge-triggered DMA transfer
THEN
the DMA cannot be triggered and no data transfer will occur.

Workaround


1. Do not switch between the ADC triggered CPU data transfer and ADC triggered DMA data transfer to avoid this condition. Or,
2. Apply a POR reset to clear the trigger DMA trigger logic inside the ADC. Or,
3. Perform a dummy DMA transfer via level trigger option (DMAxCTL.DMALEVEL=1) to clear ADC trigger logic. In this case, it is recommended to throw out current ADC conversion and ignore the data of the DMA dummy transfer.