SLAZ730B January   2019  – August 2021 MSP430FR5043

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      PM64
      2.      RGC64
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  ADC42
    2. 6.2  ADC65
    3. 6.3  ADC68
    4. 6.4  ADC69
    5. 6.5  ADC70
    6. 6.6  ADC71
    7. 6.7  CPU21
    8. 6.8  CPU22
    9. 6.9  CPU40
    10. 6.10 CPU46
    11. 6.11 CPU47
    12. 6.12 CS12
    13. 6.13 PMM31
    14. 6.14 PMM32
    15. 6.15 RTC12
    16. 6.16 TB25
    17. 6.17 USCI42
    18. 6.18 USCI45
    19. 6.19 USCI47
    20. 6.20 USCI50
  7. 7Revision History

6.1 ADC42

ADC Module

Category

Functional

Function

ADC stops converting when successive ADC is triggered before the previous conversion ends

Description

Subsequent ADC conversions are halted if a new ADC conversion is triggered while ADC is busy. ADC conversions are triggered manually or by a timer. The affected ADC modes are:

- sequence-of-channels

- repeat-single-channel

- repeat-sequence-of-channels (ADC12CTL1.ADC12CONSEQx)

In addition, the timer overflow flag cannot be used to detect an overflow (ADC12IFGR2.ADC12TOVIFG).

Workaround

1. For manual trigger mode (ADC12CTL0.ADC12SC), ensure each ADC conversion is completed by first checking ADC12CTL1.ADC12BUSY bit before starting a new conversion.

2. For timer trigger mode (ADC12CTL1.ADC12SHP), ensure the timer period is greater than the ADC sample and conversion time.

To recover the conversion halt:

1. Disable ADC module (ADC12CTL0.ADC12ENC = 0 and ADC12CTL0.ADC12ON = 0)

2. Re-enable ADC module (ADC12CTL0.ADC12ON = 1 and ADC12CTL0.ADC12ENC = 1)

3. Re-enable conversion