SLAZ171O October   2012  – May 2021 MSP430F2330

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      RHA40
      2.      YFF49
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  BCL12
    2. 6.2  BCL13
    3. 6.3  BCL16
    4. 6.4  CPU14
    5. 6.5  CPU19
    6. 6.6  CPU45
    7. 6.7  EEM20
    8. 6.8  FLASH19
    9. 6.9  FLASH22
    10. 6.10 FLASH24
    11. 6.11 FLASH27
    12. 6.12 FLASH36
    13. 6.13 JTAG14
    14. 6.14 PORT10
    15. 6.15 SYS15
    16. 6.16 TA12
    17. 6.17 TA16
    18. 6.18 TA21
    19. 6.19 TAB22
    20. 6.20 TB2
    21. 6.21 TB16
    22. 6.22 TB24
    23. 6.23 USCI15
    24. 6.24 USCI16
    25. 6.25 USCI17
    26. 6.26 USCI18
    27. 6.27 USCI20
    28. 6.28 USCI21
    29. 6.29 USCI22
    30. 6.30 USCI23
    31. 6.31 USCI24
    32. 6.32 USCI25
    33. 6.33 USCI26
    34. 6.34 USCI27
    35. 6.35 USCI29
    36. 6.36 USCI30
    37. 6.37 USCI34
    38. 6.38 USCI35
    39. 6.39 USCI40
    40. 6.40 XOSC5
    41. 6.41 XOSC8
  7. 7Revision History

6.10 FLASH24

FLASH Module

Category

Functional

Function

Write or erase emergency exit can cause failures

Description

When a flash write or erase is abruptly terminated, the following flash accesses by the CPU may be unreliable resulting in erroneous code execution. The abrupt termination can be the result of one the following events:
1) The flash controller clock is configured to be sourced by an external crystal. An oscillator fault occurs thus stopping this clock abruptly.
or
2) The Emergency Exit bit (EMEX in FCTL3) when set forces a write or an erase operation to be terminated before normal completion.
or
3) The Enable Emergency Interrupt Exit bit (EEIEX in FCTL1) when set with GIE=1 can lead to an interrupt causing an emergency exit during a Flash operation.

Workaround

1) Use the internal DCO as the flash controller clock provided from MCLK or SMCLK.
or
2) After setting EMEX = 1, wait for a sufficient amount of time before Flash is accessed again.
or
3) No Workaround. Do not use EEIEX bit.