SLAK033A December   2024  – June 2026 DAC121S101-SEP

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Overview
  5. 2 SEE Mechanisms
  6. 3 Test Device and Test Board Information
  7. 4 Irradiation Facility and Setup
  8. 5 Single-Event Latch-Up Results
  9. 6 Summary
  10. 7 Single-Event Transient Results
  11. 8 Confidence Interval Calculations
  12. 9 References
  13. 10Revision History

3 Test Device and Test Board Information

The DAC121S101-SEP is packaged in a 8-pin DGK (VSSOP) shown with the pinout in Figure 3-1. Figure 3-2 shows the biasing configuration used for both the SEL and SET tests.

DAC121S101-SEP Pinout DiagramFigure 3-1 DAC121S101-SEP Pinout Diagram

The package was decapped to reveal the die face for all heavy ion testing.

DAC121S101-SEP Bias ConfigurationFigure 3-2 DAC121S101-SEP Bias Configuration