SLAAE20 May   2021 DAC43701 , DAC43701-Q1 , DAC53701 , DAC53701-Q1

 

  1.   Design Objective
  2.   Design Description
  3.   Design Notes
  4.   Design Simulations
    1.     Transient Simulation Results
  5.   Register Settings
  6.   Pseudo Code Examples
  7.   Design Featured Devices
  8.   Design References

Pseudo Code Examples

The following shows a pseudo code sequence to program the initial register values for each configuration to the NVM of the DAC53701. The values given here are for the design choices made in the Design Notes.

Pseudo Code Example for Programmable Comparator With Hysteresis

//SYNTAX: WRITE <REGISTER NAME (Hex code)>, <MSB DATA>, <LSB DATA>  
//Power-up the device, internal reference disabled
WRITE GENERAL_CONFIG(0xD1), 0x00, 0x00 
//Configure GPI for Margin-High, Low function
WRITE CONFIG2(0xD2), 0x10, 0x00 
//Write DAC margin high code
WRITE DAC_MARGIN_HIGH(0x25), 0x09, 0x98
//Write DAC margin low code
WRITE DAC_MARGIN_LOW(0x26), 0x03, 0x34
//Enable the GPI, save settings to NVM
WRITE TRIGGER(0xD3), 0x04, 0x10

Pseudo Code Example for Latching Comparator

//SYNTAX: WRITE <REGISTER NAME (Hex code)>, <MSB DATA>, <LSB DATA>  
//Power-up the device, internal reference disabled
WRITE GENERAL_CONFIG(0xD1), 0x00, 0x00 
//Configure GPI for Power-Up, Down(10-kΩ) function
WRITE CONFIG2(0xD2), 0x08, 0x00 
//Write DAC data code
WRITE DAC_DATA(0x21), 0x09, 0x98
//Enable the GPI, save settings to NVM
WRITE TRIGGER(0xD3), 0x04, 0x10