SLAAE20 May   2021 DAC43701 , DAC43701-Q1 , DAC53701 , DAC53701-Q1

 

  1.   Design Objective
  2.   Design Description
  3.   Design Notes
  4.   Design Simulations
    1.     Transient Simulation Results
  5.   Register Settings
  6.   Pseudo Code Examples
  7.   Design Featured Devices
  8.   Design References

Transient Simulation Results

Programmable Hysteresis

This simulation shows the DAC53701 output responding to a 4-Vpp input sine wave biased around 2V. The DAC_POS value changes with the MARGIN_HIGH and MARGIN_LOW values triggered by the GPI.

GUID-20210309-CA0I-5CVW-FXJX-GCJBRSFBK3CD-low.svg

Latching Comparator

This simulation shows the DAC53701 output responding to a 4-Vpp input sine wave biased around 2V. A high pulse is applied to the GPI pin for 5ms to turn on the DAC and start the comparator. When the VIN rises to 3V, the comparator output goes low and triggers the GPI to put the DAC in power-down mode.

GUID-20210309-CA0I-KF2C-QNTQ-C1SQCKGLFT2K-low.svg