SLAA381C December   2007  – September 2018 MSP430F233 , MSP430F235 , MSP430F2410 , MSP430F247 , MSP430F248 , MSP430F249

 

  1.   Migrating From MSP430F13x and MSP430F14x MCUs to MSP430F23x and MSP430F24x MCUs
    1.     Trademarks
    2. 1 Comparison of MSP430F1xx and MSP430F2xx Families
    3. 2 Hardware Considerations for F13x/F14x to F23x/F24x Migration
      1. 2.1 Device Package and Pinout
      2. 2.2 Current Consumption
      3. 2.3 Operating Frequency and Supply Voltage
      4. 2.4 Device Errata
    4. 3 Firmware Considerations for F13x/F14x to F23x/F24x Migration
      1. 3.1 Memory Considerations
        1. 3.1.1 Device Memory Map
        2. 3.1.2 Information Flash Memory
      2. 3.2 Serial Communication – USART and USCI
        1. 3.2.1 UART Mode
        2. 3.2.2 SPI Mode
      3. 3.3 Clock System
        1. 3.3.1 LFXT1 and XT2 Oscillators
        2. 3.3.2 Digitally Controlled Oscillator (DCO)
      4. 3.4 Bootloader (BSL)
      5. 3.5 Interrupt Vectors
      6. 3.6 Beware of Reserved Bits!
      7. 3.7 Timers
      8. 3.8 Analog Comparator
    5. 4 References
  2.   Revision History

3.8 Analog Comparator

On the Comparator_A of F13x/F14x MCUs, disabling the digital port functionality for an I/O pin by setting the associated bit in the Port Disable Register CAPD to prevent parasitic cross currents during analog measurements disables the digital CMOS input buffer. However, on F23x/F24x MCUs with Comparator_A+, setting a CAPDx bit disables both input and output buffer for that pin.