SFFSAB8 December   2025 TPS7C84-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 SOIC Package
    2. 2.2 VSON Package
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 SOIC Package
    2. 4.2 VSON Package
  7. 5Revision History

1 Overview

This document contains information for the TPS7C84-Q1 (SOIC and VSON packages) to aid in a functional safety system design. Information provided are:

  • Functional safety failure in time (FIT) rates of the semiconductor component estimated by the application of industry reliability standards
  • Component failure modes and distribution (FMD) based on the primary function of the device
  • Pin failure mode analysis (pin FMA)

Figure 1-1 and Figure 1-2 show the device functional block diagram for reference.

TPS7C84-Q1 Functional Block Diagram (Adjustable) Figure 1-1 Functional Block Diagram (Adjustable)
TPS7C84-Q1 Functional Block Diagram (Fixed) Figure 1-2 Functional Block Diagram (Fixed)

The TPS7C84-Q1 was developed using a quality-managed development process, but was not developed in accordance with the IEC 61508 or ISO 26262 standards.