SFFSAB8 December   2025 TPS7C84-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 SOIC Package
    2. 2.2 VSON Package
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 SOIC Package
    2. 4.2 VSON Package
  7. 5Revision History

3 Failure Mode Distribution (FMD)

The failure mode distribution estimation for the TPS7C84-Q1 in Table 3-1 comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity, and from best engineering judgment.

The failure modes listed in this section reflect random failure events and do not include failures resulting from misuse or overstress.

Table 3-1 Die Failure Modes and Distribution
Die Failure Modes Failure Mode Distribution (%)
VOUT low (no output) 45
VOUT high (following input) 10
VOUT not in specification (voltage, or timing) 35
Short circuit any two pins 5
PG false trip, fails to trip 5