SFFS990 May   2026 UCC27614-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 DSG (SON 8) Package
    2. 2.2 D (SOIC 8) Package
    3. 2.3 DGN (VSSOP 8) Package
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 DSG (SON 8) Package
    2. 4.2 D (SOIC 8) and DGN (VSSOP 8) Package
  7. 5Revision History

Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the UCC27614-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Table 4-2 through Table 4-9 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
Class Failure Effects
A Potential device damage that affects functionality.
B No device damage, but loss of functionality.
C No device damage, but performance degradation.
D No device damage, no impact to functionality or performance.
Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:
  • Pin 1 shorted to pin 8 is not considered.
  • Pin 4 shorted to pin 5 is not considered.
  • The case of a short-circuit to supply is analyzed as a short to VDD.