SFFS060 March   2021 DRV8144-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 SPI "S" variant in VQFN-HR package
    2. 4.2 HW variant in VQFN-HR package

1 Overview

This document contains information for DRV8144-Q1 to aid in a functional safety system design. This document covers all the device package and interface variants as listed below:

  1. HW variant in VQFN-HR package
  2. SPI "S" variant in VQFN-HR package
Information provided are:

  • Functional Safety Failure In Time (FIT) rates of the semiconductor component estimated by the application of industry reliability standards
  • Component failure modes and their distribution (FMD) based on the primary function of the device
  • Pin failure mode analysis (Pin FMA) for all the package and interface variants

Figure 1-1 shows the HW device variant's functional block diagram for reference.

Figure 1-1 Functional Block Diagram for HW variant

Figure 1-2 shows the SPI "S" device variant's functional block diagram for reference.

Figure 1-2 Functional Block Diagram for SPI "S" variant

Figure 1-3 shows the SPI "P" device variant's functional block diagram for reference.

Figure 1-3 Functional Block Diagram for SPI "P" variant

DRV8144-Q1 was developed using a quality-managed development process, but was not developed in accordance with the IEC 61508 or ISO 26262 standards.

ADVANCE INFORMATION for preproduction products; subject to change without notice.