SDAA211 January   2026 MSPM0G1518 , MSPM0G1519 , MSPM0G3518 , MSPM0G3519

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Detailed Description
    1. 2.1 Overview
      1. 2.1.1 Live Firmware Update Flow
      2. 2.1.2 Memory Organization
    2. 2.2 Block Diagram
    3. 2.3 Code
      1. 2.3.1 CSC (Customer Secure Code, Bankswap_CSC_G3519_v2)
        1. 2.3.1.1 CSC - Main Function (Bankswap_CSC_G3519_v2.c)
        2. 2.3.1.2 CSC - Linker File (Bootloader.cmd)
      2. 2.3.2 App (Bankswap_G3519_gpio_output_toggle_v2_SW_Version55_CRC32)
        1. 2.3.2.1 App - Main Function (Bankswap_G3519_gpio_output_toggle_v2_SW_Version55_CRC32.c)
        2. 2.3.2.2 App – UART ISR (Bankswap_G3519_gpio_output_toggle_v2_SW_Version55_CRC32.c)
        3. 2.3.2.3 App - Linker File (device_linker.cmd)
    4. 2.4 Implementation
      1. 2.4.1 Implementation Overview
      2. 2.4.2 Implementation Process
        1. 2.4.2.1 Import CCS Project Files (TI CCS IDE)
        2. 2.4.2.2 Conduct MCU Factory Reset (TI CCS IDE)
        3. 2.4.2.3 Build CSC, App in CCS (TI CCS IDE)
        4. 2.4.2.4 Start Debug and Download Image into MCU in CCS (TI CCS IDE)
        5. 2.4.2.5 Generate Data Frame to Send (uart_frame_gui.exe)
        6. 2.4.2.6 Send New FW via UART in PC (Tera Term)
        7. 2.4.2.7 Check the Updated FW (TI CCS IDE)
  6. 3Summary
  7. 4References

2.4.2.6 Send New FW via UART in PC (Tera Term)

Send New FW via UART in PC Figure 2-11 Send New FW via UART in PC

Connect the XDS-110, which functions as a USB-to-UART bridge. Using Tera Term, the firmware data frame (.bin) is transferred to the MCU.

Due to the speed difference between USB 2.0 and UART, communication may occasionally stall. To address this, TI recommends inserting delays. In this implementation, a 1 ms delay is added every 32 bytes. This issue is related to the XDS-110 and does not affect the MCU.

After the transfer is complete, the Application verifies the firmware using CRC32. If the firmware is valid, it is programmed into Bank 1. Upon completing the flashing process, the Application triggers a BOOTRST, which transfers execution to the CSC. The CSC then checks which bank contains the latest firmware. Firmware version information is stored at the beginning of each application image (Bank 0: 0x0000.2000, Bank 1: 0x0004.2000).

If the newly flashed firmware is the latest version, the CSC initiates a bank swap, exchanging Bank 0 and Bank 1. Instructions for verifying the updated firmware are provided in the next section.