SDAA211 January   2026 MSPM0G1518 , MSPM0G1519 , MSPM0G3518 , MSPM0G3519

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Detailed Description
    1. 2.1 Overview
      1. 2.1.1 Live Firmware Update Flow
      2. 2.1.2 Memory Organization
    2. 2.2 Block Diagram
    3. 2.3 Code
      1. 2.3.1 CSC (Customer Secure Code, Bankswap_CSC_G3519_v2)
        1. 2.3.1.1 CSC - Main Function (Bankswap_CSC_G3519_v2.c)
        2. 2.3.1.2 CSC - Linker File (Bootloader.cmd)
      2. 2.3.2 App (Bankswap_G3519_gpio_output_toggle_v2_SW_Version55_CRC32)
        1. 2.3.2.1 App - Main Function (Bankswap_G3519_gpio_output_toggle_v2_SW_Version55_CRC32.c)
        2. 2.3.2.2 App – UART ISR (Bankswap_G3519_gpio_output_toggle_v2_SW_Version55_CRC32.c)
        3. 2.3.2.3 App - Linker File (device_linker.cmd)
    4. 2.4 Implementation
      1. 2.4.1 Implementation Overview
      2. 2.4.2 Implementation Process
        1. 2.4.2.1 Import CCS Project Files (TI CCS IDE)
        2. 2.4.2.2 Conduct MCU Factory Reset (TI CCS IDE)
        3. 2.4.2.3 Build CSC, App in CCS (TI CCS IDE)
        4. 2.4.2.4 Start Debug and Download Image into MCU in CCS (TI CCS IDE)
        5. 2.4.2.5 Generate Data Frame to Send (uart_frame_gui.exe)
        6. 2.4.2.6 Send New FW via UART in PC (Tera Term)
        7. 2.4.2.7 Check the Updated FW (TI CCS IDE)
  6. 3Summary
  7. 4References

App - Linker File (device_linker.cmd)

--define=_BOOT_SIZE_=(8*1024)
--define=_VERSION_SIZE_=(256)
--define=_TOTAL_SIZE_=(8*1024+256)

MEMORY
{
    BOOT			(RX)  : origin = 0x00000000,  length = _BOOT_SIZE_
    FLASH_VERSION   (RWX) : origin = _BOOT_SIZE_,  length = _VERSION_SIZE_
    FLASH           (RX)  : origin = _BOOT_SIZE_ + _VERSION_SIZE_, length = 0x00040000 - _BOOT_SIZE_ - _VERSION_SIZE_
    SRAM_BANK0      (RWX) : origin = 0x20200000,  length = 0x00010000
    SRAM_BANK1      (RWX) : origin = 0x20210000,  length = 0x00010000
    BCR_CONFIG      (R)   : origin = 0x41C00000,  length = 0x000000FF
    BSL_CONFIG      (R)   : origin = 0x41C00100,  length = 0x00000080
    DATA            (R)   : origin = 0x41D00000,  length = 0x00004000
}
SECTIONS
{
    .version_info : palign(8) {} > FLASH_VERSION
    .intvecs:   > _TOTAL_SIZE_
    .text   : palign(8) {} > FLASH
    .const  : palign(8) {} > FLASH
    .cinit  : palign(8) {} > FLASH
    .pinit  : palign(8) {} > FLASH
    .rodata : palign(8) {} > FLASH
    .ARM.exidx    : palign(8) {} > FLASH
    .init_array   : palign(8) {} > FLASH
    .binit        : palign(8) {} > FLASH
}

The Application region is located immediately after the CSC, starting at address 0x0000.2000.

At the beginning of the Application region, version information (.version_info) is stored in uint32_t format, which requires only 4 bytes. However, due to the Arm Cortex-M0+ VTOR (Vector Table Offset Register) alignment requirement of 0x100 (256 bytes), the version information section is allocated 0x100 (256 bytes).

Flash memory capacity varies depending on the MCU model. Therefore, users must configure the appropriate memory boundaries for their specific device. This example is based on the MSPM0G3519, which has 256 kB of flash memory.