SBAA634 April   2026 TAA5212 , TAA5412-Q1 , TAC5111 , TAC5111-Q1 , TAC5112 , TAC5112-Q1 , TAC5211 , TAC5212 , TAC5311-Q1 , TAC5312-Q1 , TAC5412-Q1 , TAD5112 , TAD5112-Q1 , TAD5212 , TAD5212-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Detailed Description
    1. 2.1 Common Mode Tolerance Modes
    2. 2.2 Common-Mode Rejection
    3. 2.3 Device Performance Across CM_TOL Modes
  6. 3Summary
  7. 4References

Common Mode Tolerance Modes

The TAC5x1x/TAC5x1x-Q1 family of devices support three modes of common-mode operation for the input ADCs. This mode is selected by configuring the ADC_CHx_CM_TOL field (x is the channel number) that is present in the ADC_CHx_CFG0 register (B0_P0_R80[3:2] for IN1P/IN1M, B0_P0_R85[3:2] for IN2P/IN2M). These register fields are described in Table 2-1.

Table 2-1 Register Settings for ADC Common-Mode Tolerance
Register Field Location (Book_Page_Register[MSB:LSB]) Register Field Name Register Field Description
B0_P0_R80[3:2] ADC_CH1_CM_TOL[1:0] ADC Channel 1 input common-mode tolerance (applicable for the analog input).
0d = AC-coupled input with common mode variance tolerance supported 100mVpp for differential configuration
1d = AC-coupled / DC-coupled input with common mode variance tolerance supported 1Vpp for differential configuration
2d = AC-coupled / DC-coupled input with common mode variance tolerance supported rail to rail (supply to ground) (High CMRR tolerance mode)
3d = Reserved
B0_P0_R85[3:2] ADC_CH2_CM_TOL[1:0] ADC Channel 2 input common-mode tolerance (applicable for the analog input).
0d = AC-coupled input with common mode variance tolerance supported 100mVpp for differential configuration
1d = AC-coupled / DC-coupled input with common mode variance tolerance supported 1Vpp for differential configuration
2d = AC-coupled / DC-coupled input with common mode variance tolerance supported rail to rail (supply to ground) (High CMRR tolerance mode)
3d = Reserved

Similarly, for the TAx5x42 hardware-controlled devices listed in Abstract, the common-mode tolerance can be set by configuring the MD5-MD4 pins of the device per Table 2-2.

Table 2-2 Analog Input Configurations for TAx5x42 Devices
MD5 MD4 ANALOG INPUT CONFIGURATION
Low (0) Low (0) Differential input; AC-Coupled only
Low (0) High (1) Differential input; AC or DC-Coupled with High Common Mode Tolerance
High (1) Low (0) Single-Ended input on INxP; AC-Coupled only
High (1) High (1) Single-Ended input on INxP; AC or DC-Coupled with High Common Mode Tolerance