SLVSHK0 December   2025 UCD91160

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Linearity Parameters
    7. 5.7 POR and BOR
    8. 5.8 Low Frequency Crystal/Clock
    9. 5.9 Flash Memory Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 TI Sequencer Studio Software
      2. 6.3.2 PMBUS Interface
      3. 6.3.3 PMBUS Security
    4. 6.4 Device Functional Modes
      1. 6.4.1 Black Box First Fault Logging
      2. 6.4.2 PMBus Address Selection
      3. 6.4.3 Brownout
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

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Power Supply Recommendations

Power the UCD91160 device from a 3.3V power supply.

If internal reference is used, VDD acts as ADC reference and is assumed to be exactly 3.3V. Any input voltage deviation from 3.3V introduces an error to ADC reference and to the ADC results. Therefore, the 3.3V power supply must be tightly regulated and allow only a very small voltage fluctuation (including voltage ripple and voltage deviation caused by load transients).

If external reference (VREF+) is used, the 3.3V power supply needs to meet only the minimum requirements specified in the Section 5.3 and Section 5.5.