Figure 11-1 Typical System Implementation Using 1.8V I²C Variant

The 0.1µF recommendation per supply pin is based on capacitor placement of 2 mm or less trace length away. If the placement of capacitor is further away, the value of the capacitor needs to be redetermined to account for the additional trace inductance and maintain resonance around 12MHz. Additionally, make sure the system power design has adequate bulk capacitance to account for maximum transient current expected by the device when transitioning from low power mode to active mode. GPIO2 can be optionally used as interrupt output. Make sure to adjust the pullup resistor on GPIO[0:2] based on the leakage of the APU I/O so that VIH and VIL of GPIO0 are met.

Figure 11-2 Typical System Implementation Using 1.8V Variant without I²C (Configured for Charger Detection)

The 0.1µF recommendation per supply pin is based on capacitor placement of 2 mm or less trace length away. If the placement of the capacitor is further away, then the value of the capacitor needs to be redetermined to account for the additional trace inductance and maintain resonance around 12MHz. Additionally, make sure the system power design has adequate bulk capacitance to account for maximum transient current expected by the device when transitioning from low power mode to active mode. GPIO2 can be optionally used as interrupt output. Select the pullup and pulldown resistors on GPIO[0:2] based on the USB PHY tuning needs. Use SDA for Vbus_valid detection with a voltage divider. GPIO1 and GPIO2 can be routed as needed for charger detection status. Pull-down resistor value on SCL determines the battery charging mode.