ZHCSQH7D November   2021  – April 2024 TUSB2E11

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Device Version Comparison
    1. 4.1 Device Variants
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Timing Requirements
    8. 6.8 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1  Repeater Mode
      2. 8.4.2  Power Down Mode
      3. 8.4.3  Disabled Mode
      4. 8.4.4  UART Mode
      5. 8.4.5  Auto-Resume ECR
      6. 8.4.6  L2 State Interrupt Modes
      7. 8.4.7  Attach Detect Interrupt Mode
      8. 8.4.8  GPIO Mode
      9. 8.4.9  USB 2.0 High-Speed HOST Disconnect Detection
      10. 8.4.10 Frame Based Low Power Mode
      11. 8.4.11 Battery Charging
    5. 8.5 Manufacturing Test Modes
      1. 8.5.1 USB DP Test Procedure
      2. 8.5.2 USB DM Test Procedure
    6. 8.6 I2C Target Interface
  10. 9 Register Access Protocol (RAP)
  11. 10Register Map
    1. 10.1 TUSB2E11 Registers
  12. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
      2. 11.2.2 Detailed Design Procedure
      3. 11.2.3 Application Curves
    3. 11.3 Power Supply Recommendations
      1. 11.3.1 Power Up Reset
    4. 11.4 Layout
      1. 11.4.1 Layout Guidelines
      2. 11.4.2 Example Layout for Application with 1.8V I2C Variant
  13. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 第三方产品免责声明
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 接收文档更新通知
    4. 12.4 支持资源
    5. 12.5 Trademarks
    6. 12.6 静电放电警告
    7. 12.7 术语表
  14. 13Revision History
  15. 14Mechanical, Packaging, and Orderable Information

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订购信息

11.3.1 Power Up Reset

RESETB pin is active low reset pin and can also be used as a power down pin.

The TUSB2E11 does not have power supply sequence requirements between VDD3V3 and VDD1V8.

Make sure the maximum VDD3V3 and VDD1V8 ramp time to reach minimum supply voltages is 2ms.

Digital and analog inputs may be applied when VDD3V3 and VDD1V8 are in unpowered state.

Internal power on reset circuit along with the external RESETB input pin allows for proper initialization when RESETB is de-asserted high prior to the power rails being valid. If RESETB de-assert high before the power supplies are stable, internal power on reset circuit holds off internal reset until the supplies are stable.

I2C/RAP and eUSB2 interfaces are ready after t_RH_READY upon de-assertion of RESETB or power up.

I2C/RAP and eUSB2 interfaces are ready after t_RH_READY upon soft reset through the I2C.

Upon de-assertion of RESETB (after t_RH_READY) or software reset (after t_RH_READY), the TUSB2E11 enables and enters the default state. In the default state, the TUSB2E11 is ready to accept eUSB2 packets, RAP and I2C requests. The repeater can either be in host repeater mode or device repeater mode depending on the receipt of either host mode enable or peripheral mode enable.