ZHCSR75 November   2022 TPSM82902

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Mode Selection and Device Configuration (MODE/S-CONF)
      2. 7.3.2 Adjustable VO Operation (External Voltage Divider)
      3. 7.3.3 Setable VO Operation (VSET and Internal Voltage Divider)
      4. 7.3.4 Soft Start/Tracking (SS/TR)
      5. 7.3.5 Smart Enable with Precise Threshold
      6. 7.3.6 Power Good (PG)
      7. 7.3.7 Undervoltage Lockout (UVLO)
      8. 7.3.8 Current Limit And Short Circuit Protection
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Pulse Width Modulation (PWM) Operation
      2. 7.4.2 AEE (Automatic Efficiency Enhancement)
      3. 7.4.3 Power Save Mode Operation (Auto PFM/PWM)
      4. 7.4.4 100% Duty-Cycle Operation
      5. 7.4.5 Output Discharge Function
      6. 7.4.6 Starting into a Pre-Biased Load
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application with Adjustable Output Voltage
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Programming the Output Voltage
        3. 8.2.2.3 Capacitor Selection
          1. 8.2.2.3.1 Output Capacitor
          2. 8.2.2.3.2 Input Capacitor
          3. 8.2.2.3.3 Soft-Start Capacitor
        4. 8.2.2.4 Tracking Function
      3. 8.2.3 Application Curves
    3. 8.3 Typical Application with Setable VO Using VSET
      1. 8.3.1 Design Requirements
      2. 8.3.2 Detailed Design Procedure
      3. 8.3.3 Application Curves
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
        1. 8.5.2.1 Thermal Considerations
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 第三方产品免责声明
      2. 9.1.2 Development Support
        1. 9.1.2.1 Custom Design With WEBENCH® Tools
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 术语表
  10. 10Mechanical, Packaging, and Orderable Information

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7.3.6 Power Good (PG)

The TPSM82902 has a built-in power-good (PG) feature to indicate whether the output voltage has reached its target and the device is ready. The PG signal can be used for start-up sequencing of multiple rails. The PG pin is an open-drain output that requires a pullup resistor to any voltage up to the recommended input voltage level. PG is low when the device is turned off due to EN, UVLO (undervoltage lockout), or thermal shutdown. VIN must remain present for the PG pin to stay low.

If the power-good output is not used, it is recommended to tie to GND or leave it open.

Table 7-4 Power Good Indicator Functional Table
Logic SignalsPG Status
VIEN PinThermal ShutdownVO
VI > UVLOHIGHNoVO on targetHigh Impedance
VO < targetLOW
YesxLOW
LOWxxLOW
1.8 V< VI < UVLOxxxLOW
VI < 1.8 VxxxUndefined