ZHCSH45B June 2017 – October 2021 TPS7A83A
PRODUCTION DATA
At 2 A, the dropout of the TPS7A83A has 180-mV maximum dropout over temperature, thus a 400-mV headroom is sufficient for operation over both input and output voltage accuracy. The bias rail is provided for better performance for the LILO conditions. As per Table 9-10, the PSRR is greater than 40 dB in these conditions and noise is less than 10 µVRMS.
The ANY-OUT internal resistor network is also used for maximum accuracy.
To achieve 0.9 V on the output, the 100mV pin is grounded. Equation 15 describes how the voltage value of 100 mV is added to the 0.8-V internal reference voltage for VOUT(nom) equal to 0.9 V.
Input and output capacitors are selected in accordance with the Section 9.1.1 section. Ceramic capacitors of 10 µF for the input and one 22-µF capacitor for the output are selected.
To satisfy the required start-up time and still maintain low-noise performance, a 100-nF CNR/SS is selected. Equation 16 calculates this value.
At the 2-A maximum load, the internal power dissipation is 0.6 W and corresponds to a 26.04°C junction temperature rise for the RGR package on a standard JEDEC board. With an 55°C maximum ambient temperature, the junction temperature is at 94.06°C. To further minimize noise, a feed-forward capacitor (CFF) of 10 nF is selected.