The TPS65994AE is a fully-integrated USB Power Delivery (USB-PD) management device providing cable plug and orientation detection for two USB Type-C and PD receptacles. The TPS65994AE communicates with the cable and another USB Type-C and PD device at the opposite end of the cable, enables integrated port power switch for sourcing, controls a high current port power switch for sinking and negotiates alternate modes for each port. The TPS65994AE may also control an attached super-speed multiplexer to simultaneously support USB data and DisplayPort video.

Each Type-C port controlled by the TPS65994AE is functionally identical and supports the full range of the USB Type-C and PD standards.

The TPS65994AE is divided into several main sections: the USB-PD controller, the cable plug and orientation detection circuitry, the port power switches, the power management circuitry and the digital core.

The USB-PD controller provides the physical layer (PHY) functionality of the USB-PD protocol. The USB-PD data is output through either the Px_CC1 pin or the Px_CC2 pin, depending on the orientation of the reversible USB Type-C cable. For a high-level block diagram of the USB-PD physical layer, a description of its features and more detailed circuitry, see the USB-PD Physical Layer section.

The cable plug and orientation detection analog circuitry automatically detects a USB Type-C cable plug insertion and also automatically detects the cable orientation. For a high-level block diagram of cable plug and orientation detection, a description of its features and more detailed circuitry, see the Cable Plug and Orientation Detection.

The port power switches provide power to the Px_VBUS pin and also to the Px_CC1 or Px_CC2 pins based on the detected plug orientation. For a high-level block diagram of the port power switches, a description of its features and more detailed circuitry, see the Power Paths.

The digital core provides the engine for receiving, processing and sending all USB-PD packets as well as handling control of all other TPS65994AE functionality. A portion of the digital core contains ROM memory which contains all the necessary firmware required to execute Type-C and PD applications. In addition, a section of the ROM, called boot code, is capable of initializing the TPS65994AE, loading of device configuration information and loading any code patches into volatile memory in the digital core. For a high-level block diagram of the digital core, a description of its features and more detailed circuitry, see the Digital Core section.

The digital core of the TPS65994AE also interprets and uses information provided by the analog-to-digital converter ADC (see the ADC), is configurable to read the status of general purpose inputs and trigger events accordingly, and controls general outputs which are configurable as push-pull or open-drain types with integrated pull-up or pull-down resistors. The TPS65994AE has two I²C slave ports to be controlled by host processors, and one I²C master to write to and read from external slave devices such as multiplexor, retimer, or an optional external EEPROM memory (see the I²C Interface).

The TPS65994AE also integrates a thermal shutdown mechanism and runs off of accurate clocks provided by the integrated oscillator.