ZHCSGE4B December   2010  – March 2017 TPS61240-Q1

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Current Limit Operation
      2. 7.3.2 Undervoltage Lockout
      3. 7.3.3 Input Overvoltage Protection
      4. 7.3.4 Enable
      5. 7.3.5 Soft Start
      6. 7.3.6 Load Disconnect
      7. 7.3.7 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-Save Mode
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Programming the Output Voltage
        2. 8.2.2.2 Inductor Selection
        3. 8.2.2.3 Input Capacitor
        4. 8.2.2.4 Output Capacitor
        5. 8.2.2.5 Checking Loop Stability
      3. 8.2.3 Application Curves
    3. 8.3 System Example
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 文档支持
      1. 11.1.1 相关文档
    2. 11.2 接收文档更新通知
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Detailed Description

Overview

The TPS61240-Q1 boost converter operates with typically a 3.5-MHz fixed-frequency pulse width modulation (PWM) at moderate to heavy load currents. At light load currents, the converter automatically enters Power Save Mode and then operates in pulse frequency modulation (PFM) mode.

During PWM operation the converter uses a unique fast response quasi-constant on-time valley current mode controller scheme, which allows best in class line and load regulation allowing the use of small ceramic input and output capacitors and a small inductor. During shutdown, the load is completely disconnected from the battery.

Based on the VIN/VOUT ratio, a simple circuit predicts the required on-time. At the beginning of the switching cycle, the low-side N-MOS switch is turned-on and the inductor current ramps up to a peak current that is defined by the on-time and the inductance. In the second phase, once the peak current is reached, the current comparator trips and the on-timer is reset and this turns off N-MOS switch. Now rectifier switch (P-MOS) is turned on and the inductor current decays to an internally set valley current threshold. Finally, the switching cycle repeats by setting the on timer again and activating the low-side N-MOS switch.

In general, a DC-to-DC step-up converter can only operate in true boost mode, that is, the output is boosted by a certain amount above the input voltage. The TPS61240-Q1 device operates differently as it can smoothly transition in and out of zero duty-cycle operation. Therefore, the output can be kept as close as possible to its regulation limits even though the converter is subject to an input voltage that tends to be excessive.

Functional Block Diagram

TPS61240-Q1 fbd_lvsao4.gif

Feature Description

Current Limit Operation

The current limit circuit employs a valley current sensing scheme. Current limit detection occurs during the off time through sensing of the voltage drop across the synchronous rectifier.

During the current limit operation, the output voltage is reduced as the power stage of the device operates in a constant current mode. The maximum continuous output current (IOUT(CL)), before entering current limit operation, can be defined by Equation 1.

Equation 1. TPS61240-Q1 eq1_iout_lvs806.gif

Figure 8 illustrates the inductor and rectifier current waveforms during current limit operation. The output current, IOUT, is the average of the rectifier ripple current waveform. When the load current is increased such that the lower peak is above the current limit threshold, the off time is lengthened to allow the current to decrease to this threshold before the next on-time begins (so called frequency fold-back mechanism).

TPS61240-Q1 ind_cur_lvsag8.gif Figure 8. Inductor/Rectifier Currents in Current Limit Operation

Undervoltage Lockout

The undervoltage lockout circuit prevents the device from malfunctioning at low input voltages and from excessive discharge of the battery. It disables the output stage of the converter once the falling VIN trips the undervoltage lockout threshold VUVLO. The undervoltage lockout threshold VUVLO for falling VIN is 2 V (typical). The device starts operation once the rising VIN trips undervoltage lockout threshold VUVLO again at 2.1 V (typical).

Input Overvoltage Protection

In the event of an overvoltage condition on the input rail, the output voltage will also experience the overvoltage due to being in dropout condition. An input overvoltage protection feature has been implemented into the TPS61240-Q1, which has an input overvoltage threshold of 6 V. Once this level is triggered, the device will go into shutdown mode to protect itself. If the voltage drops to 5.9 V or below, the device will startup once more into normal operation.

Enable

Setting EN pin to high, enables the device. At first, the internal reference is activated and the internal analog circuits are settled. Afterwards, the soft start activates and the output voltage ramps up. The output voltages reach nominal values in typically 250 μs after the device has been enabled.

The EN input can control power sequencing in a system with various DC/DC converters. The EN pin can be connected to the output of another converter, to drive the EN pin high and get a sequencing of supply rails. With EN = GND, the device enters shutdown mode.

Soft Start

The TPS61240-Q1 has an internal soft start circuit that controls the ramp up of the output voltage. Under no load conditions, the output voltage reaches nominal values within tStart of typically 250 μs after EN pin has been pulled to a high level.

This limits the inrush current in the converter during start up and prevents possible input voltage drops when a battery or high impedance power source is used.

During soft start, the switch current limit is reduced to 300 mA until the output voltage reaches VIN. Once the output voltage trips this threshold, the device operates with its nominal current limit ILIMF.

Load Disconnect

Load disconnect electrically removes the output from the input of the power supply when the supply is disabled. This is especially important during shutdown. In shutdown of a boost converter, the load is still connected to the input through the inductor and catch diode. Since the input voltage is still connected to the output, a small current continues to flow, even when the supply is disabled. Even small leakage currents significantly reduce battery life during extended periods of off time.

The benefit of this implemented feature for a system design is that the battery is not depleted during shutdown of the converter. No additional components must be added to the design to make sure that the battery is disconnected from the output of the converter.

Thermal Shutdown

As soon as the junction temperature, TJ, exceeds 140°C (typical) the device goes into thermal shutdown. In this mode, the High Side and Low Side MOSFETs are turned off. When the junction temperature falls below the thermal shutdown hysteresis, the device continues operation.

Device Functional Modes

Power-Save Mode

The TPS61240-Q1 family of devices integrates a power save mode to improve efficiency at light load. In power save mode, the converter only operates when the output voltage trips below a set threshold voltage. It ramps up the output voltage with several pulses and goes into power save mode once the output voltage exceeds the set threshold voltage.

TPS61240-Q1 pwr_sve_mod_lvs806.gif

The PFM mode is left and PWM mode entered in case the output current can not longer be supported in PFM mode.