7.4.1 Sequencing

The designer can implement many of the common power-supply sequencing methods using the SS/TR, EN, and PWRGD pins. Implement the sequential method using an open-drain output of a power-on-reset pin of another device. Figure 43 shows the sequential method using two TPS57140-EP devices. The power-good pin connects to the EN pin on the TPS57140-EP, which enables the second power supply when the primary supply reaches regulation. If needed, a 1-nF ceramic capacitor on the EN pin of the second power supply provides a 1-ms start-up delay. Figure 44 shows the results of Figure 43.

Figure 45 shows a method for a ratiometric start-up sequence by connecting the SS/TR pins together. The regulator outputs ramp up and reach regulation at the same time. When calculating the slow-start time, the pullup current source must be doubled in Equation 6. Figure 46 shows the results of Figure 45.

Figure 43. Schematic for Sequential Start-Up Sequence

Figure 45. Schematic for Ratiometric Start-Up Using Coupled SS/TR Pins

Figure 44. Sequential Start-Up Using EN and PWRGD

Figure 46. Ratiometric Start-Up Using Coupled SS/TR Pins

Figure 47. Schematic for Ratiometric and Simultaneous Start-Up Sequence

The designer can implement ratiometric and simultaneous power-supply sequencing by connecting the resistor network of R1 and R2 shown in Figure 47 to the output of the power supply that requires tracking, or to another voltage reference source. Using Equation 24 and Equation 25, calculate values for the tracking resistors to initiate the Vout2 slightly before, after, or at the same time as Vout1. Equation 26 is the voltage difference between Vout1 and Vout2 at 95% of nominal output regulation.

The deltaV variable is 0 V for simultaneous sequencing. To minimize the effect of the inherent SS/TR-to-VSENSE offset (Vssoffset) in the slow-start circuit and the offset created by the pullup current source (Iss) and tracking resistors, the equations include Vssoffset and Iss as variables.

To design a ratiometric start-up in which the Vout2 voltage is slightly greater than the Vout1 voltage when Vout2 reaches regulation, use a negative number in Equation 24 through Equation 26 for deltaV. Equation 26 results in a positive number for applications in which Vout2 is slightly lower than Vout1 when Vout2 regulation is achieved.

Because the SS/TR pin must be below 40 mV before starting after an EN, UVLO, or thermal shutdown fault, a design requires careful selection of the tracking resistors to ensure the device restarts after a fault. Make sure the calculated R1 value from Equation 24 is greater than the value calculated in Equation 27 to ensure the device can recover from a fault.

As the SS/TR voltage becomes more than 85% of the nominal reference voltage, Vssoffset becomes larger as the slow-start circuits gradually hand off the regulation reference to the internal voltage reference. The SS/TR pin voltage must be greater than 1.3 V for a complete handoff to the internal voltage reference as shown in Figure 24.

Equation 24.

Equation 25.

Equation 26.

Equation 27.

Figure 48. Ratiometric Start-Up With V_OUT2 Leading V_OUT1

Figure 50. Simultaneous Start-Up With Tracking Resistor

Figure 49. Ratiometric Start-Up With V_OUT1 Leading V_OUT2