ZHCS610D December 2011 – December 2021 TPS28225-Q1
PRODUCTION DATA
Table 7-1 lists the conditions under which the LGATE and UGATE pins are asserted high or low with respect to the voltage level present at VDD, EN/PG, and PWM pins.
PIN | VDD RISING
< 3.5 V OR TJ > 160°C |
VDD FALLING > 3 V AND TJ < 150°C | |||
---|---|---|---|---|---|
EN/PG
RISING < 1.7 V |
EN/PG FALLING > 1.0 V | ||||
PWM < 1 V | PWM > 1.5 V AND TRISE/TFALL < 200 ns |
PWM SIGNAL SOURCE
IMPEDANCE >40 kΩ FOR > 250 ns (3-STATE)(1) |
|||
LGATE | Low | Low | High | Low | Low |
UGATE | Low | Low | Low | High | Low |
EN/PG | Low |