ZHCS471C September   2011  – September 2019 TPL0501-100

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      简化原理图
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Thermal Information
    4. 6.4 Electrical Characteristics: Analog Specifications
    5. 6.5 Electrical Characteristics: Operating Specifications
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Single-Channel, 256-Position Resolution
    4. 7.4 Device Functional Modes
      1. 7.4.1 Voltage Divider Mode
      2. 7.4.2 Rheostat Mode
    5. 7.5 Programming
      1. 7.5.1 SPI Digital Interface
        1. Table 1. Register Map - Default Value 0x80
      2. 7.5.2 Ideal Resistance Values
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
    1. 9.1 Power Sequence
    2. 9.2 Wiper Position Upon Power Up
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 接收文档更新通知
    2. 11.2 支持资源
    3. 11.3 商标
    4. 11.4 静电放电警告
    5. 11.5 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

8.2.2 Detailed Design Procedure

The TPL0501 can be used in voltage divider mode with a unity-gain operational amplifier buffer to create an 8-bit DAC. The analog output voltage of the circuit is determined by the wiper setting programmed through the SPI Interface.

The operational amplifier is required to buffer the high-impedance output of the TPL0501 or else loading placed on the output of the voltage divider affects the output voltage.