ZHCSJ00F january 2010 – june 2023 TMS3705
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| Power Supply (VDD, VSS/VSSB, VDDA, VSSA) | ||||||
| IDD | Supply current | Sum of supply currents in Charge phase, without antenna load | 8 | 20 | mA | |
| ISleep | Supply current, Sleep state | Sum of supply currents in Sleep state, without I/O currents | 0.015 | 0.2 | mA | |
| Oscillator (OSC1, OSC2) | ||||||
| gosc | Transconductance | fosc = 4 MHz, 0.5 Vpp at OSC1 | 0.5 | 2 | 5 | mA/V |
| Cin | Input capacitance at OSC1(1) | 10 | pF | |||
| Cout | Output capacitance at OSC2(1) | 10 | pF | |||
| Logic Inputs (TXCT, F_SEL, OSC1) | ||||||
| Rpullup | Pullup resistance | TXCT | 120 | 500 | kΩ | |
| F_SEL | 10 | 500 | ||||
| Logic Outputs (SCIO, D_TST) | ||||||
| VOH | High-level output voltage | 0.8 VDD | V | |||
| VOL | Low-level output voltage | 0.2 VDD | V | |||
| Full-Bridge Outputs (ANT1, ANT2) | ||||||
| ΣRds_on | Sum of drain-source resistances | Full-bridge N-channel and P-channel MOSFETs at driver current Iant = 50 mA | 7 | 14 | Ω | |
| Duty cycle | P-channel MOSFETs of full bridge | 38% | 40% | 42% | ||
| ton1/ton2 | Symmetry of pulse durations for the P‑channel MOSFETs of full bridge | 96% | 104.5% | |||
| Ioc | Threshold for overcurrent protection | 220 | 1100 | mA | ||
| toc | Switch-off time of overcurrent protection | Short to ground with 3 Ω | 0.25 | 10 | µs | |
| tdoc | Delay for switching on the full bridge after an overcurrent | 2 | 2.05 | 2.1 | ms | |
| Ileak | Leakage current | 1 | µA | |||
| Analog Module (SENSE, SFB, A_TST) | ||||||
| ISENSE | Input current | SENSE, In charge phase | –2 | 2 | mA | |
| VDCREF/ VDD | DC reference voltage of RF amplifier, related to VDD | 9.25% | 10% | 11% | ||
| GBW | Gain-bandwidth product of RF amplifier | At 500 kHz with external components to achieve a voltage gain of minimum 4 and 5-mVpp input signal | 2 | MHz | ||
| φO | Phase shift of RF amplifier | At 134 kHz with external components to achieve a voltage gain of 5 and 20‑mVpp input signal | 16 | ° | ||
| Vsfb | Peak-to-peak input voltage of band pass at which the limiter comparator should toggle(2) | At 134 kHz (corresponds to a minimal total gain of 1000) | 5 | mV | ||
| flow | Lower cut-off frequency of band-pass filter(3) | 24 | 60 | 100 | kHz | |
| fhigh | Higher cut-off frequency of band-pass filter(3) | 160 | 270 | 500 | kHz | |
| ΔVhys | Hysteresis of limiter | A_TST pin used as input, D_TST pin as output, offset level determined by band-pass stage | 25 | 50 | 135 | mV |
| Diagnosis (SENSE) | ||||||
| Idiag | Current threshold for operating antenna(4) | 80 | 240 | µA | ||
| Phase-Locked Loop (D_TST) | ||||||
| fpll | PLL frequency | 15.984 | 16 | 16.0166 | MHz | |
| Δf/fpll | Jitter of the PLL frequency | 6% | ||||
| Power-On Reset (POR) | ||||||
| Vpor_r | POR threshold voltage, rising | VDD rising with low slope | 1.9 | 3.5 | V | |
| Vpor_f | POR threshold voltage, falling | VDD falling with low slope | 1.3 | 2.6 | V | |