22.214.171.124 Design Requirements
For this design, follow these design requirements:
- Use a proper resistor (R1) value to generate an adequate signal amplitude applied to the inverting input of the comparator.
- The low input bias current IB (2 pA typical) ensures that a greater value of R1 to be used.
- The RC constant value (R2 and C1) must support the targeted data rate (that is, 9,600 bauds) to maintain a valid tripping threshold.
- The hysteresis introduced with R3 and R4 helps to avoid spurious output toggles.