4 修订历史记录
Changes from A Revision (May 2013) to B Revision
- 已将格式更改为符合最新的数据表标准;已添加应用范围和执行,电源建议,和布局布线章节,已移动现有章节Go
- 已将说明部分中的 8 位脉宽调制 更改为 12 位脉宽调制Go
- Changed tH0 and tH1 parameter units from µs to ns in Recommended Operating Conditions table Go
- Changed Figure 8: deleted top SDO, changed bottom SDO to OUTnGo
- Changed Figure 11: deleted extraneous breaks in traces, extraneous data call-outs, and tH1 on GSLAT trace, changed data transfer trace note to Internal to 1st Device and 1st Data to 47th Data in 48-Bit Shift Register LSB traceGo
- Changed functional block diagram: changed Upper 8 Bits to Upper 12 Bits on 48-Bit Shift Register blockGo
- Added Grayscale (GS) Control, EasySet and Shunt Regulator, and No Limit Cascading sectionsGo
- Changed Connector Design title Go
- Changed Figure 13: changed OUTn traces GSDATA = 4093 and GSDATA = 4094 Go
- Changed description of the Data ‘0’ and Data ‘1’ Write Sequence (Data Write Sequence) section Go
- Changed title of Controlling Devices Connected in Series sectionGo
- Changed Data 101 to Data 1010 in Figure 18Go
- Changed eight MSBs to 12 MSBs in third sentence of the Register and Data Latch Configuration sectionGo
- Changed Figure 21: corrected 3AAh bit set sequenceGo
- Changed Figure 26: changed number of LEDs in optional dashed boxGo
- Changed Table 7: changed all values in RVCC column and first and last values in Resistor Wattage columnGo
Changes from * Revision (March 2013) to A Revision
- Changed second paragraph of Grayscale (GS) Function (PWM Control) sectionGo
- Changed tCYCLE setting range in Data Transfer Rate (tCYCLE) Measurement Sequence sectionGo
- Updated Figure 18Go
- Updated Figure 21 and Table 3Go