ZHCSNF4A June 2016 – February 2021 THS6302
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| VIH | Minimum logic high level | All digital pins, high | 2.3 | V | ||
| VIL | Maximum logic low level | All digital pins, low | 0.6 | V | ||
| VMID | Logic mid range | All digital pins, driven externally | 1.2 | 1.6 | V | |
| VFloat | Logic self-bias voltage | All digital pins, floating | 1.3 | 1.4 | 1.5 | V |
| IIH | Logic high-level leakage current | All digital pins, logic level = 3.6 V | 110 | 135 | µA | |
| IIL | Logic low-level leakage current | All digital pins, logic level = ground | –95 | –75 | µA | |
| Turn-on switching time | Line-termination mode (bias 00) to G.Fast 212-MHz mode (bias 10) | 64 | ns | |||
| Line-termination mode (bias Z0) to G.Fast 212-MHz mode (bias 10) | 50 | |||||
| Power-down mode (bias ZZ) to G.Fast 212-MHz mode (bias 10) | 60 | |||||
| Turn-off switching time | G.Fast 212-MHz mode (bias 10) to line-termination mode (bias 00) | 76 | ns | |||
| G.Fast 212-MHz mode (bias 10) to line-termination mode (bias Z0) | 400 | |||||
| G.Fast 212-MHz mode (bias 10) to power-down mode (bias ZZ) | 380 | |||||