6.5 ISS
The imaging subsystem (ISS) deals with the processing of pixel data coming from external image sensor or data from memory (image format encoding and decoding can be done to and from memory). ISS is tightly coupled with a low-interrupt latency microprocessor subsystem (Cortex-M4 IPU), which runs a real-time operating system (OS) to reach optimal performance, and can quickly change the ISS configuration during frame blanking periods and run some sequencing tasks.
ISS is a key component for Rear View Camera, Front View Stereo Camera, and Surround View Camera applications.
ISS targets the following major use cases:
- Video / Preview
- Up to 1080p60
- Up to 2x 1080p30
- Stereo Video / Preview
- Multi-camera use cases, with capabilty of up to 4 simultaneous cameras (ISP is time shared)
ISS offers the following main features:
- ISS interfaces:
- One Camera Adapter Layer (CAL) module supporting DMA function for data read from system memory
- 128-bit data interface to L3_MAIN system interconnect
- Image Signal Processor (ISP):
- Memory-to-memory processing
- Up to 532 MPix/s throughput
- Statistic data collection
- Image pipe interface (IPIPEIF) front-end RAW data processing
- IPIPE back-end RGB and YUV data processing
- High-ISO video noise filtering (NSF3V)
- Global and local contrast enhancement accelerator (GLBCE)
- Two image continuous real-time resizers (RSZ)
- Chroma noise filter (CNF)
- Still Image Coprocessor (SIMCOP):
- Memory-to-memory operation
- Warping accelerator (LDC)
- Temporal video noise filter (VTNF)
- Direct memory access (DMA) controller
- Hardware sequencer
- Mesh based lens distortion and perspective correction
For more information, see chapter Imaging Subsystem of the Device TRM.