SLVSJ83 April   2026 TCA9848

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics (Global)
    6. 5.6 I2C Interface Timing Requirements
    7. 5.7 Reset Timing Requirements
    8. 5.8 Switching Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 RESET Input
      2. 7.4.2 Power-On Reset
    5. 7.5 Programming
      1. 7.5.1 I2C Interface
      2. 7.5.2 Device Address
      3. 7.5.3 Bus Transactions
        1. 7.5.3.1 Writes
        2. 7.5.3.2 Reads
      4. 7.5.4 Control Register
      5. 7.5.5 RESET Input
      6. 7.5.6 Power-On Reset
      7. 7.5.7 Software Reset
      8. 7.5.8 Device ID
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Voltage Translation Requirements
      2. 8.2.2 Detailed Design Procedure
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power-On Reset Requirements
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information
    2. 11.2 Mechanical Data

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7.5.7 Software Reset

The Software Reset Call provides a mechanism to return all devices on the I²C bus to the power-up default state by issuing a specifically formatted I²C command. This operation assumes that the I²C bus is operating correctly and that no device is holding the bus in a latched or “hung” condition. The Software Reset sequence is defined as the following:

  1. The I²C controller issues a START condition.
  2. The controller transmits the reserved General Call address '0000 000' with the R/W bit set to 0 (write).
  3. A device acknowledges only when detecting the full General Call address 0000 0000 (00h). If the R/W bit is set to 1 (read), no acknowledge is generated.
  4. After the General Call address is acknowledged, the controller transmits a single data byte with the value 06h.
    1. The device acknowledges only when this data byte is equal to 06h.
    2. If the data byte is not 06h, or if more than one data byte is transmitted, the device does not acknowledge further.
    3. When the correct byte has been received and acknowledged, the controller must issue a STOP condition to complete the Software Reset sequence. At this point, the device resets the registers to the power-up default values and becomes ready for subsequent bus transactions after the required bus-free time.
    4. If a Repeated START condition is issued instead of a STOP, the reset is not performed.
    5. Any missing acknowledge from the device at any point in this sequence shall be treated by the controller as a Software Reset Abort. In such a case, the device does not initiate any register reset.