SLASFB7A November   2024  – August 2025 TAS5802

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5.   Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
      1. 5.7.1 Bridge Tied Load (BTL) Configuration Curves with 1SPW Modulation
      2. 5.7.2 Bridge Tied Load (BTL) Configuration Curves with BD Modulation
  8. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Power Supplies
      2. 6.3.2 Device Clocking
      3. 6.3.3 Serial Audio Port – Clock Rates
      4. 6.3.4 Serial Audio Port (SAP)
      5. 6.3.5 Digital Audio Processing
      6. 6.3.6 Class D Audio Amplifier
        1. 6.3.6.1 Speaker Amplifier Gain Select
    4. 6.4 Device Functional Modes
      1. 6.4.1 Software Control
      2. 6.4.2 Speaker Amplifier Operating Modes
        1. 6.4.2.1 BTL Mode
      3. 6.4.3 Low EMI Modes
        1. 6.4.3.1 Spread Spectrum
        2. 6.4.3.2 Channel to Channel Phase Shift
        3. 6.4.3.3 Multi-Devices PWM Phase Synchronization
      4. 6.4.4 Thermal Foldback
      5. 6.4.5 Device State Control
      6. 6.4.6 Device Modulation
        1. 6.4.6.1 BD Modulation
        2. 6.4.6.2 1SPW Modulation
        3. 6.4.6.3 Hybrid Modulation
    5. 6.5 Programming and Control
      1. 6.5.1 I2C Serial Communication Bus
      2. 6.5.2 Target Address
        1. 6.5.2.1 Random Write
        2. 6.5.2.2 Sequential Write
        3. 6.5.2.3 Random Read
        4. 6.5.2.4 Sequential Read
        5. 6.5.2.5 DSP Memory Book, Page and BQ update
        6. 6.5.2.6 Checksum
          1. 6.5.2.6.1 Cyclic Redundancy Check (CRC) Checksum
          2. 6.5.2.6.2 Exclusive or (XOR) Checksum
      3. 6.5.3 Control via Software
        1. 6.5.3.1 Startup Procedures
        2. 6.5.3.2 Shutdown Procedures
        3. 6.5.3.3 Protection and Monitoring
          1. 6.5.3.3.1 Overcurrent Shutdown (OCSD)
          2. 6.5.3.3.2 DC Detect
          3. 6.5.3.3.3 Device Over Temperature Protection
          4. 6.5.3.3.4 Over Voltage Protection
          5. 6.5.3.3.5 Under Voltage Protection
          6. 6.5.3.3.6 Clock Fault
  9. Register Maps
    1. 7.1 CONTROL PORT Registers
  10. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Bootstrap Capacitors
      2. 8.1.2 Inductor Selections
      3. 8.1.3 Power Supply Decoupling
      4. 8.1.4 Output EMI Filtering
    2. 8.2 Typical Applications
      1. 8.2.1 2.0 (Stereo BTL) System
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedures
          1. 8.2.1.2.1 Step 1: Hardware Integration
          2. 8.2.1.2.2 Step 2: Speaker Tuning
          3. 8.2.1.2.3 Step 3: Software Integration
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 DVDD Supply
      2. 8.3.2 PVDD Supply
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 General Guidelines for Audio Amplifiers
        2. 8.4.1.2 Importance of PVDD Bypass Capacitor Placement on PVDD Network
        3. 8.4.1.3 Optimizing Thermal Performance
          1. 8.4.1.3.1 Device, Copper, and Component Layout
          2. 8.4.1.3.2 Stencil Pattern
            1. 8.4.1.3.2.1 PCB footprint and Via Arrangement
            2. 8.4.1.3.2.2 Solder Stencil
      2. 8.4.2 Layout Example
  11. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Device Nomenclature
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  12. 10Revision History
  13. 11Mechanical, Packaging, and Orderable Information
    1.     PACKAGE OPTION ADDENDUM
    2. 11.1 Tape and Reel Information
    3. 11.2 Mechanical Data

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Bridge Tied Load (BTL) Configuration Curves with 1SPW Modulation

Free-air room temperature 25°C (unless otherwise noted). Measurements were made using Audio Precision System 2722 with Analog Analyzer filter set to 20-kHz brickwall filter. All measurements taken with audio frequency set to 1 kHz and device PWM frequency set to 384 kHz, 80 kHz Class D Loop Bandwidth, the LC filter used was 10 μH / 0.68 μF, unless otherwise noted.

TAS5802 THD+N
                        vs FrequencyFigure 5-1 THD+N vs Frequency
TAS5802 THD+N
                        vs FrequencyFigure 5-3 THD+N vs Frequency
TAS5802 THD+N
                        vs FrequencyFigure 5-5 THD+N vs Frequency
TAS5802 THD+N
                        vs FrequencyFigure 5-7 THD+N vs Frequency
TAS5802 THD+N
                        vs FrequencyFigure 5-9 THD+N vs Frequency
TAS5802 THD+N
                        vs Output PowerFigure 5-11 THD+N vs Output Power

TAS5802 THD+N vs Output Power
Figure 5-13 THD+N vs Output Power

TAS5802 THD+N vs Output
                        Power
Figure 5-15 THD+N vs Output Power

TAS5802 THD+N vs Output Power
Figure 5-17 THD+N vs Output Power

TAS5802 Output Power vs Supply Voltage
Figure 5-19 Output Power vs Supply Voltage
TAS5802 Idle
                        Channel Noise vs Supply VoltageFigure 5-21 Idle Channel Noise vs Supply Voltage
TAS5802 Crosstalk Figure 5-23 Crosstalk

TAS5802 Crosstalk
Figure 5-25 Crosstalk

TAS5802 Crosstalk
Figure 5-27 Crosstalk
TAS5802 PVDD
                        Idle Current vs PVDD VoltageFigure 5-29 PVDD Idle Current vs PVDD Voltage
TAS5802 Efficiency vs Output Power Figure 5-31 Efficiency vs Output Power
TAS5802 THD+N
                        vs FrequencyFigure 5-2 THD+N vs Frequency
TAS5802 THD+N
                        vs FrequencyFigure 5-4 THD+N vs Frequency
TAS5802 THD+N
                        vs FrequencyFigure 5-6 THD+N vs Frequency
TAS5802 THD+N
                        vs FrequencyFigure 5-8 THD+N vs Frequency
TAS5802 THD+N
                        vs FrequencyFigure 5-10 THD+N vs Frequency

TAS5802 THD+N vs Output
                        Power
Figure 5-12 THD+N vs Output Power
TAS5802 THD+N
                        vs Output PowerFigure 5-14 THD+N vs Output Power

TAS5802 THD+N vs Output Power
Figure 5-16 THD+N vs Output Power

TAS5802 Output Power vs Supply Voltage
Figure 5-18 Output Power vs Supply Voltage

TAS5802 Output Power vs Supply
                        Voltage
Figure 5-20 Output Power vs Supply Voltage

TAS5802 Gain vs Frequency
Figure 5-22 Gain vs Frequency
TAS5802 Crosstalk Figure 5-24 Crosstalk

TAS5802 Crosstalk
Figure 5-26 Crosstalk

TAS5802 Crosstalk
Figure 5-28 Crosstalk
TAS5802 Efficiency vs Output PowerFigure 5-30 Efficiency vs Output Power

TAS5802 Efficiency vs Output Power
Figure 5-32 Efficiency vs Output Power