ZHCSRD0H August   1987  – January 2023 SN65ALS180 , SN75ALS180

PRODUCTION DATA  

  1. 1 特性
  2. 2 说明
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics - Driver
    5. 5.5 Switching Characteristics - Driver
    6. 5.6 Symbol Equivalents
    7. 5.7 Electrical Characteristics - Receivers
    8. 5.8 Switching Characteristics - Receivers
    9. 5.9 Typical Characteristics
  6. 6 Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Functional Block Diagram
    2. 7.2 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
  9. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  10. 10Mechanical, Packaging, and Orderable Information

封装选项

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机械数据 (封装 | 引脚)
  • N|14
散热焊盘机械数据 (封装 | 引脚)
订购信息

5.5 Switching Characteristics - Driver

over recommended ranges of supply voltage and operating free-air temperature
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
td(OD) Differential output delay time RL = 54 Ω CL = 50 pF, See Figure 6-3 3 8 13 ns
Pulse skew (|td(ODH)– td(ODL)|) RL = 54 Ω CL = 50 pF, See Figure 6-3 1 6 ns
tt(OD) Differential output transition time RL = 54 Ω CL = 50 pF, See Figure 6-3 3 8 13 ns
tPZH Output enable time to high level RL = 110 Ω See Figure 6-4 23 50 ns
tPZL Output enable time to low level RL = 110 Ω See Figure 6-5 19 24 ns
tPHZ Output disable time from high level RL = 110 Ω See Figure 6-4 8 13 ns
tPLZ Output disable time from low level RL = 110 Ω See Figure 6-5 8 13 ns
(1) All typical values are at VCC = 5 V and TA = 25°C.