SCES198N April   1999  – December 2015 SN74LVC2G08

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Specifications
    1. 3.1 Absolute Maximum Ratings
    2. 3.2 ESD Ratings
    3. 3.3 Thermal Information
    4. 3.4 Electrical Characteristics
    5. 3.5 Typical Characteristics
  4. 4Detailed Description
    1. 4.1 Overview
    2. 4.2 Functional Block Diagram
    3. 4.3 Feature Description
      1. 4.3.1 Down Voltage Translation
    4. 4.4 Device Functional Modes
  5. 5Application and Implementation
    1. 5.1 Application Information
    2. 5.2 Typical Application
      1. 5.2.1 Design Requirements
      2. 5.2.2 Detailed Design Procedure
      3. 5.2.3 Application Curves
  6. 6Power Supply Recommendations
  7. 7Layout
    1. 7.1 Layout Guidelines
    2. 7.2 Layout Example
  8. 8Device and Documentation Support
    1. 8.1 Community Resources
    2. 8.2 Trademarks
    3. 8.3 Electrostatic Discharge Caution
    4. 8.4 Glossary
  9. 9Mechanical, Packaging, and Orderable Information

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4 Detailed Description

4.1 Overview

The SN74LVC1G06 device contains two positive-AND gates with a maximum sink current of 24 mA. A very low tpd of 4.7ns at 3.3V makes the device ideal for high speed applications. Additionally, 5.5V tolerant inputs allow the device to be used as a down translator if needed.

4.2 Functional Block Diagram

SN74LVC2G08 ld_ces198.gif

4.3 Feature Description

4.3.1 Down Voltage Translation

SN74LVC2G08 allows for logic input and output signals up to 5.5 V. While operating at VCC of 3.3 V, the device will still recognize 5.5 V as a valid high input, however, the resulting output will be 3.3 V. This is the same for other voltage levels in the device effectively down translating any input logic level higher than VCC but lower or equal to 5.5 V.

4.4 Device Functional Modes

Table 1 lists the functional modes of the SN74LVC2G08.

Table 1. Function Table

INPUTS OUTPUT
A B Y
H H H
L X L
X L L