SCLS469F March   2003  – December 2014 SN74LV4052A-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Operating Characteristics
    6. 6.6 Electrical Characteristics
    7. 6.7 Switching Characteristics VCC = 3.3 V ± 0.3 V
    8. 6.8 Switching Characteristics VCC = 5 V ± 0.5 V
    9. 6.9 Analog Switch Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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6 Specifications

6.1 Absolute Maximum Ratings(1)

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VCC Supply voltage range –0.5 7 V
VI Input voltage range(2) –0.5 7
VIO Switch I/O voltage range(2)(3) –0.5 VCC + 0.5
IIK Input clamp current VI < 0 –20 mA
IIOK I/O diode current VIO < 0 –50
IT Switch through current VIO = 0 to VCC ±25
Continuous current through VCC or GND ±50
Tstg Storage temperature range –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The maximum limit for this value is 5.5 V.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per AEC Q100-002(1) ±2000 V
Charged device model (CDM), per AEC Q100-011 Corner pins (2Y0, GND, VCC, and B) ±750
Other pins ±500
(1) AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions(1)

MIN NOM MAX UNIT
VCC Supply voltage 2(2) 5.5 V
VIH High-level input voltage,
control inputs		 VCC = 2 V 1.5 V
VCC = 2.3 V to 2.7 V VCC × 0.7
VCC = 3 V to 3.6 V VCC × 0.7
VCC = 4.5 V to 5.5 V VCC × 0.7
VIL Low-level input voltage,
control inputs		 VCC = 2 V 0.5 V
VCC = 2.3 V to 2.7 V VCC × 0.3
VCC = 3 V to 3.6 V VCC × 0.3
VCC = 4.5 V to 5.5 V VCC × 0.3
VI Control input voltage 0 5.5 V
VIO Input/output voltage 0 VCC V
Δt/Δv Input transition rise or fall rate VCC = 2.3 V to 2.7 V 200 ns/V
VCC = 3 V to 3.6 V 100
VCC = 4.5 V to 5.5 V 20
TA Operating free-air temperature SN74LV4052ATDRQ1, SN74LV4052ATPWRQ1 –40 105 °C
TA Operating free-air temperature SN74LV4052AQPWRQ1 –40 125
(1) Hold all unused inputs of the device at VCC or GND to ensure proper device operation. See the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
(2) With supply voltages at or near 2 V, the analog switch on-state resistance becomes very nonlinear. TI recommends transmitting only digital signals at these low supply voltages.

6.4 Thermal Information

THERMAL METRIC SN74LV4052A-Q1 UNIT
D PW
16 PINS 16 PINS
RθJA Junction-to-ambient thermal resistance 85.9 113.3 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 44.6 48.1 °C/W
RθJB Junction-to-board thermal resistance 43.4 58.4 °C/W
ψJT Junction-to-top characterization parameter 13.4 6.2 °C/W
ψJB Junction-to-board characterization parameter 43.1 57.8 °C/W

6.5 Operating Characteristics

VCC = 3.3 V, TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS TYP UNIT
Cpd Power dissipation capacitance CL = 50 pF, f = 10 MHz 11.8 pF

6.6 Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VCC TA = -40 to 105°C TA = -40 to 125°C UNIT
MIN TYP MAX MIN TYP MAX
ron On-state switch resistance IT = 2 mA,
VI = VCC or GND,
VINH = VIL
(see Figure 1)		 2.3 V 225 225 Ω
3 V 190 190
4.5 V 100 100
ron(p) Peak on-state resistance IT = 2 mA,
VI = VCC or GND,
VINH = VIL		 2.3 V 600 600 Ω
3 V 225 225
4.5 V 125 125
Δron Difference in on-state resistance between switch IT = 2 mA,
VI = VCC or GND,
VINH = VIL		 2.3 V 40 40 Ω
3 V 30 30
4.5 V 20 20
II Control input current VI = 5.5 V or GND 0 V to 5.5 V ±1 ±2 μA
IS(off) Off-state switch leakage current VI = VCC and
VO = GND, or
VI = GND and
VO = VCC,
VINH = VIH
(see Figure 2)		 5.5 V ±1 ±2 μA
IS(on) On-state switch leakage current VI = VCC or GND,
VINH = VIL
(see Figure 3)		 5.5 V ±1 ±2 μA
ICC Supply current VI = VCC or GND 5.5 V 20 40 μA

6.7 Switching Characteristics VCC = 3.3 V ± 0.3 V

over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER FROM
(INPUT)		 TO
(OUTPUT		 TEST CONDITIONS TA = -40 to 105°C TA = -40 to 125°C UNIT
MIN TYP MAX MIN TYP MAX
tPLH Propagation delay time COM or Y Y or COM CL = 50 pF
(see Figure 4)		 12 14 ns
tPHL
tPZH Enable delay time INH COM or Y CL = 50 pF
(see Figure 5)		 25 25 ns
tPZL
tPHZ Disable delay time INH COM or Y CL = 50 pF
(see Figure 5)		 25 25 ns
tPLZ

6.8 Switching Characteristics VCC = 5 V ± 0.5 V

over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER FROM
(INPUT)		 TO
(OUTPUT		 TEST CONDITIONS TA = -40 to 105°C TA = -40 to 125°C UNIT
MIN TYP MAX MIN TYP MAX
tPLH Propagation delay time COM or Y Y or COM CL = 50 pF
(see Figure 4)		 8 10 ns
tPHL
tPZH Enable delay time INH COM or Y CL = 50 pF
(see Figure 5)		 18 18 ns
tPZL
tPHZ Disable delay time INH COM or Y CL = 50 pF
(see Figure 5)		 18 18 ns
tPLZ

6.9 Analog Switch Characteristics

over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER FROM
(INPUT)		 TO
(OUTPUT)		 TEST CONDITIONS VCC TA = 25°C UNIT
MIN TYP MAX
Frequency response
(switch on)		 COM or Y Y or COM CL = 50 pF,
RL = 600 Ω,
fin = 1 MHz (sine wave)(1)
(see Figure 6)		 2.3 V 30 MHz
3 V 35
4.5 V 50
Crosstalk
(between any switches))		 COM or Y Y or COM CL = 50 pF,
RL = 600 Ω,
fin = 1 MHz (sine wave)
(seeFigure 7 )		 2.3 V –45 dB
3 V –45
4.5 V –45
Crosstalk
(control input to signal output)		 INH COM or Y CL = 50 pF,
RL = 600 Ω,
fin = 1 MHz (square wave)
(see Figure 8)		 2.3 V 20 mV
3 V 35
4.5 V 65
Feedthrough attenuation
(switch off)		 COM or Y Y or COM CL = 50 pF,
RL = 600 Ω,
fin = 1 MHz(2)
(see Figure 9)		 2.3 V –45 dB
3 V –45
4.5 V –45
Sine-wave distortion COM or Y Y or COM CL = 50 pF,
RL = 10 kΩ,
fin = 1 kHz (sine wave)
(see Figure 10)		 VI = 2 Vp-p 2.3 V 0.1%
VI = 2.5 Vp-p 3 V 0.1%
VI = 4 Vp-p 4.5 V 0.1%
(1) Adjust fin voltage to obtain 0-dBm output. Increase fin frequency until dB meter reads −3 dB.
(2) Adjust fin voltage to obtain 0-dBm input.